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gitlab-ci.yml
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llc_interference: Add shared data channel gitlab-ci #4515: Commit 141d471 pushed by niwis
15s nw/llc-partitions
nw/llc-partitions
15s
Fix CVA6 Stall error gitlab-ci #4514: Commit b34d228 pushed by Xeratec
3m 16s wiesep/chimera-main
wiesep/chimera-main
3m 16s
Fix CVA6 Stall error gitlab-ci #4513: Commit 4de7307 pushed by Xeratec
3m 22s wiesep/chimera-pulp-v2.0.0
wiesep/chimera-pulp-v2.0.0
3m 22s
Add windows support gitlab-ci #4512: Pull request #227 synchronize by HepoH3
Action required HepoH3:windows_support
HepoH3:windows_support
Action required
Add windows support gitlab-ci #4511: Pull request #227 synchronize by HepoH3
Action required HepoH3:windows_support
HepoH3:windows_support
Action required
ci: Bump CI gitlab-ci #4510: Commit 9b1547b pushed by fischeti
4m 34s fischeti/new-gitlab-ci
fischeti/new-gitlab-ci
4m 34s
serial_link: Integrate new version gitlab-ci #4509: Pull request #253 synchronize by fischeti
12m 20s fischeti/rdl-slink
fischeti/rdl-slink
12m 20s
rdl: Parametrize serial link properly gitlab-ci #4508: Commit 5d5ea0e pushed by fischeti
12m 10s fischeti/rdl-slink
fischeti/rdl-slink
12m 10s
clint: systemRDL based register generation gitlab-ci #4507: Pull request #252 synchronize by fischeti
4h 22m 52s fischeti/rdl-clint
fischeti/rdl-clint
4h 22m 52s
bootrom: Regenerate SV sources gitlab-ci #4506: Commit 5a17309 pushed by fischeti
4h 23m 0s fischeti/rdl-clint
fischeti/rdl-clint
4h 23m 0s
treewide: Migrate SoC register file and address map to SystemRDL gitlab-ci #4505: Pull request #260 synchronize by fischeti
2h 16m 24s fischeti/rdl
fischeti/rdl
2h 16m 24s
lint: Update verible waiver gitlab-ci #4504: Commit e6c7988 pushed by fischeti
2h 16m 26s fischeti/rdl
fischeti/rdl
2h 16m 26s
clint: systemRDL based register generation gitlab-ci #4503: Pull request #252 synchronize by fischeti
2h 8m 10s fischeti/rdl-clint
fischeti/rdl-clint
2h 8m 10s
bootrom: Regenerate SV sources gitlab-ci #4502: Commit 343fdc2 pushed by fischeti
2h 8m 10s fischeti/rdl-clint
fischeti/rdl-clint
2h 8m 10s
clint: systemRDL based register generation gitlab-ci #4501: Pull request #252 synchronize by fischeti
1m 52s fischeti/rdl-clint
fischeti/rdl-clint
1m 52s
bootrom: Regenerate SV sources gitlab-ci #4500: Commit cc5c764 pushed by fischeti
56s fischeti/rdl-clint
fischeti/rdl-clint
56s
serial_link: Integrate new version gitlab-ci #4499: Pull request #253 synchronize by fischeti
2h 14m 3s fischeti/rdl-slink
fischeti/rdl-slink
2h 14m 3s
rdl: Parametrize serial link properly gitlab-ci #4498: Commit a39e775 pushed by fischeti
2h 14m 5s fischeti/rdl-slink
fischeti/rdl-slink
2h 14m 5s
treewide: Migrate SoC register file and address map to SystemRDL gitlab-ci #4497: Pull request #260 synchronize by fischeti
1h 59m 0s fischeti/rdl
fischeti/rdl
1h 59m 0s
lint: Update verible waiver gitlab-ci #4496: Commit 4402e32 pushed by fischeti
1h 58m 56s fischeti/rdl
fischeti/rdl
1h 58m 56s
treewide: Migrate SoC register file and address map to SystemRDL gitlab-ci #4495: Pull request #260 synchronize by fischeti
3m 4s fischeti/rdl
fischeti/rdl
3m 4s
lint: Update verible waiver gitlab-ci #4494: Commit ccb6a90 pushed by fischeti
3m 13s fischeti/rdl
fischeti/rdl
3m 13s
clint: systemRDL based register generation gitlab-ci #4493: Pull request #252 synchronize by fischeti
4h 30m 48s fischeti/rdl-clint
fischeti/rdl-clint
4h 30m 48s
bootrom: Regenerate SV sources gitlab-ci #4492: Commit 3f829ae pushed by fischeti
4h 30m 47s fischeti/rdl-clint
fischeti/rdl-clint
4h 30m 47s
serial_link: Integrate new version gitlab-ci #4491: Pull request #253 synchronize by fischeti
2h 31m 26s fischeti/rdl-slink
fischeti/rdl-slink
2h 31m 26s