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Replace the lowRISC regtool-based hjson register description with a
SystemRDL source and peakrdl-regblock generated RTL. The generated
register block uses an APB4-flat CPU interface; a reg_to_apb bridge is
added in cheshire_soc to convert from the internal reg_iface demux.
- Add hw/regs/rdl/cheshire_regs.rdl (register source)
- Generate hw/regs/rtl/cheshire_regs{,_pkg}.sv via peakrdl regblock
- Update cheshire.mk: PEAKRDL_INCLUDES, replace regtool make rule
- Update sw/sw.mk: switch cheshire.h to chs_sw_gen_hdr_rule_rdl
- Update Bender.yml: point to new rtl/ file locations
- Update hw/cheshire_soc.sv: add reg_to_apb bridge, new pkg types
- Delete hw/regs/cheshire_regs.hjson and hjson-generated SV files
…er access Create hw/regs/cheshire.rdl as a top-level SystemRDL address map that places cheshire_regs at its canonical base address (0x0300_0000, from cheshire_pkg.sv). Update the build system to generate sw/include/regs/cheshire.h from this map via `peakrdl c-header`, and fix the PEAKRDL_INCLUDES path. Update all SW files (util.h, zsl.c, flash.c, gpt.c) to access registers through the generated cheshire_regs_t struct instead of the old _REG_OFFSET macros.
… names Replace all remaining uses of *_REG_OFFSET macros and CHESHIRE_HW_FEATURES_*_BIT constants in SW tests with the struct-based cheshire_regs_t access pattern and the corresponding CHESHIRE_REGS__HW_FEATURES__*_bp bit-position macros generated by peakrdl c-header.
…er access Add apb_mask bitmap to reg_out_t in cheshire_pkg.sv, where bit i indicates that reg-bus port i requires an APB4-flat bridge. Populate it in gen_reg_out (currently only cheshire_regs/RegOut.regs). In cheshire_soc.sv, replace the hand-wired reg_to_apb instance and named APB signals with a generate loop that instantiates reg_to_apb for every port flagged in apb_mask. Future APB IPs need only set their bit in gen_reg_out — no structural changes to cheshire_soc.sv required. Also fixes the previous use of undefined chs_regs_apb_req_t/resp_t types by switching to apb_req_t/apb_resp_t already defined by CHESHIRE_TYPEDEF_ALL.
Add CHS_REGS macro to util.h for typed access to the Cheshire SoC register file, replacing the previous chs_hw_feature_present() helper which required ugly CHESHIRE_REGS__HW_FEATURES__*_bp bit-position macros. Hardware feature checks now access named struct fields directly (e.g. CHS_REGS->hw_features.f.dma). The base address is now derived from the RDL-generated cheshire_t struct via offsetof(cheshire_t, cheshire_regs), removing the dependency on the linker symbol __base_regs in C code. Remove the corresponding extern declaration from params.h (the linker symbol is retained in common.ldh for smp.h assembly). Update all call sites to use CHS_REGS consistently.
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The serial link received the SystemRDL treatment among other improvents for integration & parametrization
TODO:
_reserved_Xx_Yyfield names if non-default configurations are used.serial_linkonce this PR is approved.peakrdl-regblockpackage in Gitlab CI python environment.ERROR: Cannot start server on port 3042: already in use.errors during FPGA boot jobs.