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VIXL Release 1.3
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Refer to the README.md and LICENCE files for details.
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armvixl committed Mar 21, 2014
1 parent f37fdc0 commit b0c8ae2
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8 changes: 6 additions & 2 deletions README.md
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VIXL: AArch64 Runtime Code Generation Library Version 1.2
VIXL: AArch64 Runtime Code Generation Library Version 1.3
=========================================================

Contents:
Expand All @@ -16,7 +16,7 @@ To build VIXL the following software is required:

1. Python 2.7
2. SCons 2.0
3. GCC 4.4
3. GCC 4.4+

A 64-bit host machine is required, implementing an LP64 data model. VIXL has
only been tested using GCC on Ubuntu systems.
Expand Down Expand Up @@ -62,6 +62,10 @@ The VIXL simulator supports only those instructions that the VIXL assembler can
generate. The `doc` directory contains a
[list of supported instructions](doc/supported-instructions.md).

The VIXL simulator was developed to run on 64-bit amd64 platforms. Whilst it
builds and mostly works for 32-bit x86 platforms, there are a number of
floating-point operations which do not work correctly, and a number of tests
fail as a result.

Usage
=====
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6 changes: 5 additions & 1 deletion SConstruct
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Expand Up @@ -69,6 +69,7 @@ TARGET_SRC_FILES = {
test/cctest.cc
test/test-utils-a64.cc
test/test-assembler-a64.cc
test/test-simulator-a64.cc
test/test-disasm-a64.cc
test/test-fuzz-a64.cc
test/examples/test-examples.cc
Expand Down Expand Up @@ -136,7 +137,10 @@ env['RANLIB'] = os.environ.get('RANLIB', env.get('RANLIB'))
env['CC'] = os.environ.get('CC', env.get('CC'))
env['LD'] = os.environ.get('LD', env.get('LD'))

env.Append(CPPFLAGS = os.environ.get('CPPFLAGS'))
if os.environ.get('CPPFLAGS'):
env.Append(CPPFLAGS = os.environ.get('CPPFLAGS').split())
if os.environ.get('LINKFLAGS'):
env.Append(LINKFLAGS = os.environ.get('LINKFLAGS').split())

# Always look in 'src' for include files.
env.Append(CPPPATH = [PROJ_SRC_DIR])
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8 changes: 8 additions & 0 deletions doc/changelog.md
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VIXL Change Log
===============

* 1.3
+ Address inaccuracies in the simulated floating point instructions.
+ Implement Default-NaN floating point mode.
+ Introduce `UseScratchRegisterScope` for controlling the use of temporary
registers.
+ Enable building VIXL on 32-bit hosts.
+ Other small bug fixes and improvements.

* 1.2
+ Added support for `fmadd`, `fnmadd`, `fnmsub`, `fminnm`, `fmaxnm`,
`frinta`, `fcvtau` and `fcvtas`.
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