drivers: mspi: Support MSPI driver for STM32. #96670

ExaltZephyr · 2025-09-28T09:17:48Z

This PR introduces support for MSPI driver on STM32, enabling functionality APIs for MSPI host controllers.

mspi_stm32_xspi driver
- support xspi
- tested using stm32h573i_dk and stm32h7s78_dk boards
- functionalities:
  - Indirect Mode (read, write and erase).
  - DTR support.
  - Memory map mode (read and write).
  - xip configuration.
  - DMA Mode
  - Zephyr Power Management Support
ospi_stm32 driver
- support octospi
- tested using stm32h735g_disco and b_u585i_iot02a
- functionalities:
  - Indirect mode (read, write and erase)
  - DTR support
  - Memory map mode (read b_u585i_iot02a board)
  - xip configuration
  - DMA transfer (b_u585i_iot02a board)
  - zephyr power management support
mspi_stm32_qspi driver
- support quadspi
- tested using arduino_giga_r1/stm32h747xx/m7
- functionalities:
  - Indirect mode (read, write and erase) with MSPI_IO_MODE_SINGLE
  - Indirect mode (read, write and erase) with MSPI_IO_MODE_QUAD_1_1_4
  - Memory map mode (read)
  - Zephyr Power Management Support
  - DMA transfer: not supported yet

Notes:

This PR was tested with JEDEC flash drivers and has not been tested with PSRAM.
mspi_stm32_xspi driver - DMA mode here was tested using stm32h573i_dk board only since no zephyr dma support on stm32h7s78_dk

erwango · 2025-10-02T15:37:39Z

dts/bindings/mspi/st,stm32-xspi-controller.yaml

Please rename to dts/bindings/mspi/st,stm32-xspi-controller.yaml MSPI is the subsytem api and XSPI is the ST IP name.
Apply everywhere (driver files, ....) on this PR..

dts/bindings/mspi/st,stm32-mspi-controller.yaml

drivers/mspi/CMakeLists.txt

erwango · 2025-10-02T15:48:43Z

drivers/mspi/mspi_stm32.c

+
+}
+
+static int flash_stm32_xspi_dma_init(DMA_HandleTypeDef *hdma, struct stream *dma_stream)


s/flash_stm32_xspi_dma_init/mspi_stm32_xspi_dma_init

erwango · 2025-10-02T16:01:01Z

dts/bindings/mspi/st,stm32-xspi-controller.yaml

+      For example
+         dma-names = "tx_rx";
+
+  ssht-enable:


For the three IPs, these bindings will have to propose the same configuration options as the union of dts/bindings/memory-controllers/st,stm32-xspi-psram.yaml and dts/bindings/flash_controller/st,stm32-xspi-nor.yaml

Note that this may potentially be done as a follow up PR

FRASTM · 2025-10-28T10:29:32Z

drivers/mspi/mspi_stm32_qspi.c

+
+LOG_MODULE_REGISTER(mspi_stm32_qspi, CONFIG_MSPI_LOG_LEVEL);
+
+static inline int mspi_context_lock(struct mspi_context *ctx, const struct mspi_dev_id *req,


should this be mspi_context_lock(struct mspi_stm32_context *ctx ?

drivers/mspi/mspi_stm32_qspi.c

etienne-lms · 2025-10-29T10:52:36Z

samples/drivers/mspi/mspi_flash/boards/arduino_giga_r1_stm32h747xx_m7.overlay

+		device_type = "memory";
+		reg = <0x90000000 DT_SIZE_M(256)>;
+		zephyr,memory-region = "QSPI";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;


Preferrably without the outer parentheeses, e.g.:

zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_FLASH)>;

etienne-lms · 2025-10-29T10:54:15Z

samples/drivers/mspi/mspi_flash/boards/stm32h735g_disco.overlay

+				command-length ="INSTR_2_BYTE";
+				rx-dummy = <20>;
+				jedec-id = [ c2 85 3a  ];
+				partitions {


Coudl you add an empty line above?

etienne-lms · 2025-10-29T10:57:20Z

samples/drivers/mspi/mspi_flash/boards/b_u585i_iot02a.overlay

+			#address-cells = <1>;
+			#size-cells = <0>;
+			op-mode = "MSPI_CONTROLLER";
+			status = "okay";


Prefer have the status property last among the node properties. Not a blocking issue.

drivers/mspi/Kconfig.stm32

drivers/mspi/mspi_stm32.h

drivers/mspi/mspi_stm32_ospi.c

etienne-lms · 2025-10-29T11:34:11Z

drivers/mspi/mspi_stm32_ospi.c

+
+e_return:
+
+	k_mutex_unlock(&data->lock);


Mutex was lokced only upon data->dev_id != dev_id. Condition to test also here.
Ditto for the unlock instruction above at line 1098.

drivers/mspi/mspi_stm32_ospi.c

etienne-lms · 2025-10-29T11:41:36Z

drivers/mspi/mspi_stm32_ospi.c

+		.dev_cfg = {0},                                                                    \
+		.xip_cfg = {0},                                                                    \
+		.ctx.lock = Z_SEM_INITIALIZER(mspi_stm32_dev_data_##index.ctx.lock, 0, 1),         \
+		OSPI_DMA_CHANNEL(DT_DRV_INST(index), tx_rx)};                            \


Suggested change

OSPI_DMA_CHANNEL(DT_DRV_INST(index), tx_rx)}; \

OSPI_DMA_CHANNEL(DT_DRV_INST(index), tx_rx), \

}; \

JarmouniA

To be applied for all instances in all files.

@ExaltZephyr Please apply review remarks (the ones you agree with) for all instances across all files. Otherwise, comment with your disagreement under the unaddressed ones.

etienne-lms

Sorry for flooding with coding style comments. I tried to be exhaustive, covering the 3 drivers.

drivers/mspi/mspi_stm32_ospi.c

etienne-lms · 2025-10-29T15:29:45Z

drivers/mspi/mspi_stm32_ospi.c

+	uint32_t addr = dev_data->memmap_base_addr + packet->address;
+	uint32_t size = packet->num_bytes;
+
+	size = (size + 31U) & ~31U;


Keep size = (size + 31U) & ~31U; above? If you keep this, asserting size below is useless.

etienne-lms · 2025-10-29T15:31:11Z

drivers/mspi/mspi_stm32_ospi.c

+		switch (access_mode) {
+		case MSPI_ACCESS_SYNC:
+			hal_ret = HAL_OSPI_Receive(&dev_data->hmspi.ospi, packet->data_buf,
+					       HAL_OSPI_TIMEOUT_DEFAULT_VALUE);


hal_ret value is not tested. Ditto in MSPI_TX path below.

drivers/mspi/mspi_stm32_ospi.c

drivers/mspi/mspi_stm32_xspi.c

etienne-lms · 2025-10-29T16:25:50Z

drivers/mspi/mspi_stm32_xspi.c

+ *
+ * @retval 0 if successful.
+ * @retval -EINVAL invalid capabilities, failed to configure device.
+ * @retval -ENOTSUP capability not supported by MSPI peripheral.


There seems to be other possible return value. Mentioning A negative errno value upon failure would maybe be simpler.

This comment applies to other function inline description comments in this P-R.

drivers/mspi/mspi_stm32_xspi.c

ExaltZephyr · 2025-10-30T12:20:38Z

I'm guessing you use hardware CE only and support only one device under the same controller? There is no ce-gpios in DTS and yet mspi_verify_device is copied directly from ambiq driver.. What is the plan for multi-peripheral support?

@swift-tk Yes, that’s correct — currently, we only support one device connected to the controller. I don’t think there’s a plan to extend this for now.
Should we remove mspi_verify_device then?

etienne-lms · 2025-10-31T08:14:48Z

dts/bindings/mspi/st,stm32-ospi-controller.yaml

+
+  dma-names:
+    description: |
+      DMA channel name. If DMA should be used, expected value is "tx_rx".


I think you could add here:

enum: - "tx_rx"

Ditto for the QSPI and XSPI bindings.

etienne-lms · 2025-10-31T08:17:24Z

dts/bindings/mspi/st,stm32-xspi-controller.yaml

+  dmas:
+    description: |
+      Optional DMA channel specifier, required for DMA transactions.
+      For example dmas for TX/RX on xspi


Here also, dmas description is not needed since already described in the relevant DMA binding description.

drivers/mspi/Kconfig.stm32

etienne-lms · 2025-10-31T08:18:48Z

drivers/mspi/Kconfig.stm32

+	help
+	  Enable QSPI driver for STM32 family of processors.
+
+#DT_STM32_OCTOSPI_HAS_DMA := $(dt_compat_any_has_prop,$(DT_COMPAT_ST_STM32_OSPI),dmas)


Could you remove this line?

etienne-lms · 2025-10-31T08:21:22Z

drivers/mspi/mspi_stm32.h

+	bool dst_addr_increment;
+};
+
+union hmspi_handle {


Suggested change

union hmspi_handle {

union mspi_stm32_handle {

etienne-lms · 2025-10-31T09:28:16Z

drivers/mspi/mspi_stm32_xspi.c

+		}
+#else
+		ret = mspi_stm32_xspi_access(controller, packet,
+					     (ctx->xfer.async == true) ? MSPI_ACCESS_ASYNC


etienne-lms · 2025-10-31T09:29:59Z

drivers/mspi/mspi_stm32_xspi.c

+	if (((xfer->packets->cmd == SPI_NOR_OCMD_RDSR) ||
+	     (xfer->packets->cmd == SPI_NOR_CMD_RDSR))) {


Suggested change

if (((xfer->packets->cmd == SPI_NOR_OCMD_RDSR) ||

(xfer->packets->cmd == SPI_NOR_CMD_RDSR))) {

if ((xfer->packets->cmd == SPI_NOR_OCMD_RDSR) ||

(xfer->packets->cmd == SPI_NOR_CMD_RDSR)) {

etienne-lms · 2025-10-31T09:31:49Z

drivers/mspi/mspi_stm32_xspi.c

+#endif
+
+#if defined(DLYB_XSPI1) || defined(DLYB_XSPI2) || defined(DLYB_OCTOSPI1) || defined(DLYB_OCTOSPI2)
+	HAL_XSPI_DLYB_CfgTypeDef mspi_delay_block_cfg = {0};


Could you add an empty line below?

etienne-lms · 2025-10-31T09:33:04Z

drivers/mspi/mspi_stm32_xspi.c

+	(void)pm_device_runtime_put(spec->bus);
+
+	if (ret == 0) {
+		LOG_INF("MSPI config'd");


Suggested change

LOG_INF("MSPI config'd");

LOG_INF("MSPI configured");

Does this really belong to the info log level? What about LOG_DBG()?

etienne-lms · 2025-10-31T09:35:27Z

drivers/mspi/mspi_stm32_xspi.c

+		.xip_cfg = {0},                                                                    \
+		.ctx.lock = Z_SEM_INITIALIZER(mspi_stm32_dev_data_##index.ctx.lock, 0, 1),         \
+		XSPI_DMA_CHANNEL(DT_DRV_INST(index), tx, TX, MEMORY, PERIPHERAL)                   \
+			XSPI_DMA_CHANNEL(DT_DRV_INST(index), rx, RX, PERIPHERAL, MEMORY)};         \


Suggested change

XSPI_DMA_CHANNEL(DT_DRV_INST(index), rx, RX, PERIPHERAL, MEMORY)}; \

XSPI_DMA_CHANNEL(DT_DRV_INST(index), rx, RX, PERIPHERAL, MEMORY), \

}; \

etienne-lms · 2025-10-31T09:52:41Z

drivers/mspi/mspi_stm32_ospi.c

+ *
+ * @retval 0 if successful.
+ * @retval -ESTALE device ID don't match, need to call mspi_dev_config first.
+ * @retval -Error transfer failed.


Suggested change

* @retval -Error transfer failed.

* @retval A negative errno value upon failure.

8 other occurrences in this commit.

This commit adds the main DTS configurations required to enable MSPI/OSPI/QSPI support on STM32. Signed-off-by: Sara Touqan <[email protected]> Signed-off-by: Sarah Younis <[email protected]> Signed-off-by: Mohammad Odeh <[email protected]>

This commit introduces support for the mspi and ospi drivers on STM32, enabling functionality APIs for MSPI/OSPI/QSPI host controllers.. Signed-off-by: Sara Touqan <[email protected]> Signed-off-by: Sarah Younis <[email protected]> Signed-off-by: Mohammad Odeh <[email protected]>

this commit enables building and running the sample on stm32h573i_dk board,stm32h735g_disco board, arduino_giga_r1 board, and b_u585i_iot02a board by providing the required overlay and configuration updates. Signed-off-by: Sara Touqan <[email protected]> Signed-off-by: Sarah Younis <[email protected]> Signed-off-by: Mohammad Odeh <[email protected]>

sonarqubecloud · 2025-11-02T14:32:23Z

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
6.5% Duplication on New Code

See analysis details on SonarQube Cloud

ExaltZephyr force-pushed the stm32-mspi-support branch 8 times, most recently from 834dc73 to 7e8241c Compare September 29, 2025 11:59

FRASTM mentioned this pull request Sep 30, 2025

[WIP] stm32 MSPI controller driver #93320

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erwango mentioned this pull request Nov 4, 2025

drivers: memc: stm32 xspi psram aps6404 #98781

Open


		}

		static int flash_stm32_xspi_dma_init(DMA_HandleTypeDef hdma, struct stream dma_stream)


		LOG_MODULE_REGISTER(mspi_stm32_qspi, CONFIG_MSPI_LOG_LEVEL);

		static inline int mspi_context_lock(struct mspi_context ctx, const struct mspi_dev_id req,

	OSPI_DMA_CHANNEL(DT_DRV_INST(index), tx_rx)}; \
	OSPI_DMA_CHANNEL(DT_DRV_INST(index), tx_rx), \
	}; \

		if (((xfer->packets->cmd == SPI_NOR_OCMD_RDSR) \|\|
		(xfer->packets->cmd == SPI_NOR_CMD_RDSR))) {

	XSPI_DMA_CHANNEL(DT_DRV_INST(index), rx, RX, PERIPHERAL, MEMORY)}; \
	XSPI_DMA_CHANNEL(DT_DRV_INST(index), rx, RX, PERIPHERAL, MEMORY), \
	}; \

	* @retval -Error transfer failed.
	* @retval A negative errno value upon failure.


		e_return:

		k_mutex_unlock(&data->lock);

drivers: mspi: Support MSPI driver for STM32. #96670

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drivers: mspi: Support MSPI driver for STM32. #96670

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ExaltZephyr commented Oct 30, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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ExaltZephyr commented Sep 28, 2025 •

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