boards: nxp: imx95_evk_15x15: add i.MX 95 15x15 LPDDR4x EVK variant

[asellaminxp]

Add initial support for i.MX 95 15x15 LPDDR4x EVK board. This board uses the i.MX 95 15x15 SoC that shares many similarities to the already supported i.MX 95 19x19 SoC used for the i.MX 95 19x19 LPDDR5 EVK.

This enables Zephyr to boot and run on the i.MX 95 15x15 EVK and provides a foundation for further peripheral enablement and application development.

Depends on:

• dts: nxp: mimx9596cvtxn-pinctrl: fix iomuxc node reference hal_nxp#553

[iuliana-prodan]

Why do you need to add a new board for 15x15?
On a quick look all files you added here are the same as those from imx95_evk.

[asellaminxp]

I updated the commit, which should show more difference between the two boards (especially the doc/index.rst and the different pinctrl dtsi).

We need a different board due to the different packaging of the SoC (with slight differences in the pinctrl DTSI) and to adapt to the differences in peripherals between the two boards.
The current patch only adds an initial support, so it is for now very similar to the imx95_evk board, but it will diverge at some point (for instance for the usage of the different ethernet interfaces). So, to avoid future conflict, we started a separate board support for it right away.

CC: @GhMarwen

[JiafeiPan]

Please fix twister issue.

[github-actions]

The following west manifest projects have changed revision in this Pull Request:

Name	Old Revision	New Revision	Diff
hal_nxp	zephyrproject-rtos/hal_nxp@111f568 (master)	zephyrproject-rtos/hal_nxp#553	zephyrproject-rtos/hal_nxp#553/files

⛔ DNM label due to: 1 project with PR revision

Note: This message is automatically posted and updated by the Manifest GitHub Action.

[mmahadevan108]

@asellaminxp please re-visit this PR.

[asellaminxp]

The build issue was due to missing pinmux nodes in the https://github.com/zephyrproject-rtos/hal_nxp/blob/master/dts/nxp/nxp_imx/mimx9596cvtxn-pinctrl.dtsi file, where iomuxc_gpio_io35_gpio_io_bit_gpio5_io_bit15, iomuxc_gpio_io36_gpio_io_bit_gpio5_io_bit16 and iomuxc_gpio_io37_gpio_io_bit_gpio5_io_bit17.
A temporary fix would be to move the gpio pinmux definitions at the board level.

CC: @GhMarwen

[JiafeiPan]

The build issue was due to missing pinmux nodes in the https://github.com/zephyrproject-rtos/hal_nxp/blob/master/dts/nxp/nxp_imx/mimx9596cvtxn-pinctrl.dtsi file, where iomuxc_gpio_io35_gpio_io_bit_gpio5_io_bit15, iomuxc_gpio_io36_gpio_io_bit_gpio5_io_bit16 and iomuxc_gpio_io37_gpio_io_bit_gpio5_io_bit17. A temporary fix would be to move the gpio pinmux definitions at the board level.

CC: @GhMarwen

Hi, @asellaminxp , pinmux is not board level, it should be SoC level. as 15x15 has different pinmux with 19x19, so it should have a standalone SoC dts, as they have the same memory layout for all peripherals, so could create a common dtsi common.dtsi like to cover these common part, then in 19x19.dtsi and 15x15.dtsi will include common.dtsi and silicon specified pinmux dts nodes.

[asellaminxp]

The build issue was due to missing pinmux nodes in the https://github.com/zephyrproject-rtos/hal_nxp/blob/master/dts/nxp/nxp_imx/mimx9596cvtxn-pinctrl.dtsi file, where iomuxc_gpio_io35_gpio_io_bit_gpio5_io_bit15, iomuxc_gpio_io36_gpio_io_bit_gpio5_io_bit16 and iomuxc_gpio_io37_gpio_io_bit_gpio5_io_bit17. A temporary fix would be to move the gpio pinmux definitions at the board level.
CC: @GhMarwen

Hi, @asellaminxp , pinmux is not board level, it should be SoC level. as 15x15 has different pinmux with 19x19, so it should have a standalone SoC dts, as they have the same memory layout for all peripherals, so could create a common dtsi common.dtsi like to cover these common part, then in 19x19.dtsi and 15x15.dtsi will include common.dtsi and silicon specified pinmux dts nodes.

Indeed, I created the new DTSIs for 19x19 and 15x15, as suggested.

[JiafeiPan]

revision: refs/pull/553/head

[asellaminxp]

Done

[JiafeiPan]

I think this should be the first commit to add dts for 15x15, then the second one will add the board. so that it will not break bisect.

[asellaminxp]

Done

[JiafeiPan]

Suggest to refine the commit message like:
dts: nxp: imx95-ca55: add dts for SoC 15x15 variant

As, i.MX 95 19x19 and i.MX 95 15x15 have different pinmux definitions, so keep
common part in nxp_mimx95_a55.dtsi, and define separate dts file for each variant,
they include common part and pinmux definitions.

[asellaminxp]

I reworded the commit message as suggested. Thanks

[JiafeiPan]

looks fine for me.

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

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