Add support for sqdmulh in aarch64
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sqdmulh in aarch neoverse_n1sqdmulh in aarch
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sqdmulh in aarchsqdmulh in aarch64
mkannwischer
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Can you add this to the instructions.s test please?
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and neoverse_n1 - This commit adds support for the vector variant of sqdmulh in AArch64. In addition, this instruction shares the same microarchitecture model as other Vqdmulh instructions on the Neoverse_n1. Signed-off-by: willieyz <[email protected]>
- `sqdmulh` - SWOG: page 34 of 48 - inverse throughput: 1 - latency 4 - Dual issue: 11 Signed-off-by: willieyz <[email protected]>
- sqdmulh - SWOG: page 24 of 42 - inverse throughput: 2 - latency 5 Signed-off-by: willieyz <[email protected]>
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Hello, @mkannwischer , thank your for your review! |
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sqdmulhin the Neoverse N1 model, as it is required for optimizingpoly_decompose_32_asm.Sin: