Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
@@ -1,4 +1,8 @@
# CHANGELOG

## [3.9.2] - 2024-06-11
- Fixed reversed order of zicboz and Zicsr in cbo.zero RVTEST_ISA/RVTET_CASE strings. Note that Sail does not yet handle cbo.zero

## [3.9.1] - 2024-05-24
- Split rv32i_m/F/fnmadd_b15.S, fnmsub_b15.S, fmadd_b15.S, fmsub_b15.S into multiple smaller tests
- Split each _b15 file into 50 files consists of 768 (128*6) tests
Expand Down
4 changes: 2 additions & 2 deletions riscv-test-suite/rv32i_m/CMO/src/cbo.zero-01.S
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
//
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IZicsr_Zicboz")
RVTEST_ISA("RV32IZicboz_Zicsr")

.section .text.init
.globl rvtest_entry_point
Expand All @@ -30,7 +30,7 @@ RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*32.*I.*Zicsr.*Zicboz.*);def TEST_CASE_1=True;",cbozero)
RVTEST_CASE(0,"//check ISA:=regex(.*32.*I.*Zicboz.*Zicsr.*);def TEST_CASE_1=True;",cbozero)

RVTEST_SIGBASE(x2,signature_x2_1)

Expand Down
4 changes: 2 additions & 2 deletions riscv-test-suite/rv64i_m/CMO/src/cbo.zero-01.S
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
//
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64IZicboz")
RVTEST_ISA("RV64IZicboz_Zicsr")

.section .text.init
.globl rvtest_entry_point
Expand All @@ -30,7 +30,7 @@ RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*64.*I.*Zicsr.*Zicboz.*);def TEST_CASE_1=True;",cbozero)
RVTEST_CASE(0,"//check ISA:=regex(.*64.*I.*Zicboz.*Zicsr.*);def TEST_CASE_1=True;",cbozero)

RVTEST_SIGBASE(x3,signature_x3_1)

Expand Down