Skip to content

WIP synthesis using yosys-slang

a2f0faf
Select commit
Loading
Failed to load commit list.
Sign in for the full log view
Draft

WIP: synthesis using yosys-slang #181

WIP synthesis using yosys-slang
a2f0faf
Select commit
Loading
Failed to load commit list.
GitHub Actions / verible-verilog-lint completed Nov 23, 2025 in 1s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (1)

hw/cheshire_synth_wrapper.sv|8 col 9| Package declaration name must match the file name (ignoring optional "_pkg" file name suffix). declaration: "cheshire_synth_wrapper_pkg" vs. basename(file): "cheshire_synth_wrapper" [Style: file-names] [package-filename]

Filtered Findings (0)

Annotations

Check warning on line 8 in hw/cheshire_synth_wrapper.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/cheshire_synth_wrapper.sv#L8

Package declaration name must match the file name (ignoring optional "_pkg" file name suffix).  declaration: "cheshire_synth_wrapper_pkg" vs. basename(file): "cheshire_synth_wrapper" [Style: file-names] [package-filename]
Raw output
message:"Package declaration name must match the file name (ignoring optional \"_pkg\" file name suffix).  declaration: \"cheshire_synth_wrapper_pkg\" vs. basename(file): \"cheshire_synth_wrapper\" [Style: file-names] [package-filename]" location:{path:"hw/cheshire_synth_wrapper.sv" range:{start:{line:8 column:9}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}