Add an OpenTitan custom "unimplemented device" with support for Comportable registers

hw/opentitan/Kconfig

@@ -164,4 +164,7 @@ config OT_TIMER
 config OT_UART
     bool
 
+config OT_UNIMP
+    bool
+
 source otbn/Kconfig

hw/opentitan/meson.build

@@ -53,5 +53,6 @@ system_ss.add(when: 'CONFIG_OT_SPI_HOST', if_true: files('ot_spi_host.c'))
 system_ss.add(when: 'CONFIG_OT_SRAM_CTRL', if_true: files('ot_sram_ctrl.c'))
 system_ss.add(when: 'CONFIG_OT_TIMER', if_true: files('ot_timer.c'))
 system_ss.add(when: 'CONFIG_OT_UART', if_true: files('ot_uart.c'))
+system_ss.add(when: 'CONFIG_OT_UNIMP', if_true: files('ot_unimp.c'))
 
 subdir('otbn')

hw/opentitan/ot_aes.c

@@ -56,8 +56,8 @@
 
 /* clang-format off */
 REG32(ALERT_TEST, 0x0u)
-    FIELD(ALERT_TEST, RECOV_CTRL_UPDATE_ERR, 0, 1u)
-    FIELD(ALERT_TEST, FATAL_FAULT, 1, 1u)
+    SHARED_FIELD(ALERT_RECOV_CTRL_UPDATE_ERR, 0u, 1u)
+    SHARED_FIELD(ALERT_FATAL_FAULT, 1u, 1u)
 REG32(KEY_SHARE0_0, 0x4u)
 REG32(KEY_SHARE0_1, 0x8u)
 REG32(KEY_SHARE0_2, 0xcu)
@@ -120,6 +120,10 @@ REG32(STATUS, 0x84u)
 #define OT_AES_IV_BM_MASK       ((1u << (PARAM_NUM_REGS_IV)) - 1u)
 #define OT_AES_DATA_BM_MASK     ((1u << (PARAM_NUM_REGS_DATA)) - 1u)
 
+#define OT_AES_ALERT_STATUS_OFFSET \
+    (R_STATUS_ALERT_RECOV_CTRL_UPDATE_ERR_SHIFT - \
+     ALERT_RECOV_CTRL_UPDATE_ERR_SHIFT)
+
 #define OT_AES_DATA_SIZE (PARAM_NUM_REGS_DATA * sizeof(uint32_t))
 #define OT_AES_KEY_SIZE  (PARAM_NUM_REGS_KEY * sizeof(uint32_t))
 #define OT_AES_IV_SIZE   (PARAM_NUM_REGS_IV * sizeof(uint32_t))
@@ -327,7 +331,8 @@ static inline uint32_t ot_aes_get_key_mask(OtAESRegisters *r)
 static void ot_aes_update_alert(OtAESState *s)
 {
     for (unsigned ix = 0; ix < PARAM_NUM_ALERTS; ix++) {
-        bool level = (bool)(s->regs->status & (1u << ix));
+        bool level =
+            (bool)(s->regs->status & (1u << (ix + OT_AES_ALERT_STATUS_OFFSET)));
         ibex_irq_set(&s->alerts[ix], (int)level);
     }
 }
@@ -1095,10 +1100,10 @@ static void ot_aes_write(void *opaque, hwaddr addr, uint64_t val64,
 
     switch (reg) {
     case R_ALERT_TEST:
-        if (val32 & R_ALERT_TEST_RECOV_CTRL_UPDATE_ERR_MASK) {
+        if (val32 & ALERT_RECOV_CTRL_UPDATE_ERR_MASK) {
             r->status |= R_STATUS_ALERT_RECOV_CTRL_UPDATE_ERR_MASK;
         }
-        if (val32 & R_ALERT_TEST_FATAL_FAULT_MASK) {
+        if (val32 & ALERT_FATAL_FAULT_MASK) {
             r->status |= R_STATUS_ALERT_FATAL_FAULT_MASK;
         }
         ot_aes_update_alert(s);

hw/opentitan/ot_alert.c

@@ -1008,15 +1008,11 @@ static void ot_alert_realize(DeviceState *dev, Error **errp)
 
     OtAlertState *s = OT_ALERT(dev);
 
+    g_assert(s->ot_id);
     g_assert(s->n_alerts != 0);
     g_assert(s->pclk != 0);
     g_assert(s->n_classes > 0 && s->n_classes <= 32);
 
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
-
     size_t size = sizeof(OtAlertIntr) + sizeof(OtAlertPing) +
                   sizeof(OtAlertTemplate) * s->n_alerts +
                   sizeof(OtAlertTemplate) * LOCAL_ALERT_COUNT +

hw/opentitan/ot_aon_timer.c

@@ -532,10 +532,8 @@ static void ot_aon_timer_realize(DeviceState *dev, Error **errp)
     (void)errp;
 
     OtAonTimerState *s = OT_AON_TIMER(dev);
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
+
+    g_assert(s->ot_id);
 }
 
 static void ot_aon_timer_init(Object *obj)

hw/opentitan/ot_edn.c

@@ -1085,8 +1085,8 @@ static uint64_t ot_edn_regs_read(void *opaque, hwaddr addr, unsigned size)
         val32 = s->regs[reg];
         break;
     case R_SW_CMD_STS: {
-        uint32_t rdy = (uint32_t) ot_edn_is_cmd_rdy(s, false);
-        uint32_t reg_rdy = (uint32_t) ot_edn_is_cmd_rdy(s, true);
+        uint32_t rdy = (uint32_t)ot_edn_is_cmd_rdy(s, false);
+        uint32_t reg_rdy = (uint32_t)ot_edn_is_cmd_rdy(s, true);
         val32 = s->regs[R_SW_CMD_STS];
         val32 = FIELD_DP32(val32, SW_CMD_STS, CMD_STS, s->rng.last_cmd_status);
         val32 = FIELD_DP32(val32, SW_CMD_STS, CMD_RDY, rdy);
@@ -1163,6 +1163,7 @@ static void ot_edn_regs_write(void *opaque, hwaddr addr, uint64_t val64,
     case R_ALERT_TEST:
         val32 &= ALERT_TEST_MASK;
         s->regs[R_ALERT_TEST] = val32;
+        ot_edn_update_alerts(s);
         break;
     case R_REGWEN:
         val32 &= R_REGWEN_EN_MASK;

hw/opentitan/ot_gpio_dj.c

@@ -815,11 +815,6 @@ static void ot_gpio_dj_reset_enter(Object *obj, ResetType type)
     OtGpioDjClass *c = OT_GPIO_DJ_GET_CLASS(obj);
     OtGpioDjState *s = OT_GPIO_DJ(obj);
 
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
-
     s->log_en = s->log_id ? !strcmp(s->ot_id, s->log_id) : true;
 
     if (s->log_en) {
@@ -896,6 +891,8 @@ static void ot_gpio_dj_realize(DeviceState *dev, Error **errp)
     OtGpioDjState *s = OT_GPIO_DJ(dev);
     (void)errp;
 
+    g_assert(s->ot_id);
+
     qemu_chr_fe_set_handlers(&s->chr, &ot_gpio_dj_chr_can_receive,
                              &ot_gpio_dj_chr_receive,
                              &ot_gpio_dj_chr_event_hander,

hw/opentitan/ot_hmac.c

@@ -1229,10 +1229,8 @@ static void ot_hmac_realize(DeviceState *dev, Error **errp)
     (void)errp;
 
     OtHMACState *s = OT_HMAC(dev);
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
+
+    g_assert(s->ot_id);
 }
 
 static void ot_hmac_reset(DeviceState *dev)

hw/opentitan/ot_i2c_dj.c

@@ -959,11 +959,6 @@ static void ot_i2c_dj_reset(DeviceState *dev)
 {
     OtI2CDjState *s = OT_I2C_DJ(dev);
 
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(dev)->parent));
-    }
-
     i2c_end_transfer(s->bus);
 
     for (unsigned index = 0; index < ARRAY_SIZE(s->irqs); index++) {
@@ -984,6 +979,8 @@ static void ot_i2c_dj_realize(DeviceState *dev, Error **errp)
     OtI2CDjState *s = OT_I2C_DJ(dev);
     (void)errp;
 
+    g_assert(s->ot_id);
+
     /* TODO: check if the following can be moved to ot_i2c_dj_init */
     s->bus = i2c_init_bus(dev, TYPE_OT_I2C_DJ);
     s->target = i2c_slave_create_simple(s->bus, TYPE_OT_I2C_DJ_TARGET, 0xff);

hw/opentitan/ot_lc_ctrl.c

@@ -2178,10 +2178,7 @@ static void ot_lc_ctrl_realize(DeviceState *dev, Error **errp)
     (void)errp;
     OtLcCtrlState *s = OT_LC_CTRL(dev);
 
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
+    g_assert(s->ot_id);
 
     ot_lc_ctrl_configure_lc_states(s);
     ot_lc_ctrl_configure_transitions(s, LC_CTRL_TRANS_LC_TCOUNT,

hw/opentitan/ot_otp_eg.c

@@ -308,8 +308,10 @@ REG32(LC_STATE, 2008u)
 
 #define INTR_MASK (INTR_OTP_OPERATION_DONE_MASK | INTR_OTP_ERROR_MASK)
 #define ALERT_TEST_MASK \
-    (R_ALERT_TEST_FATAL_MACRO_ERROR_MASK | R_ALERT_TEST_FATAL_CHECK_ERROR_MASK | \
-     R_ALERT_TEST_FATAL_BUS_INTEG_ERROR_MASK | R_ALERT_TEST_FATAL_PRIM_OTP_ALERT_MASK | \
+    (R_ALERT_TEST_FATAL_MACRO_ERROR_MASK | \
+     R_ALERT_TEST_FATAL_CHECK_ERROR_MASK | \
+     R_ALERT_TEST_FATAL_BUS_INTEG_ERROR_MASK | \
+     R_ALERT_TEST_FATAL_PRIM_OTP_ALERT_MASK | \
      R_ALERT_TEST_RECOV_PRIM_OTP_ALERT_MASK)
 
 #define SW_CFG_WINDOW      0x800u
@@ -667,14 +669,13 @@ static bool ot_otp_eg_is_readable(OtOTPEgState *s, int partition, unsigned addr)
                                         READ_LOCK);
             break;
         case OTP_PART_ROT_CREATOR_AUTH_CODESIGN:
-            rdaccess =
-                (bool)SHARED_FIELD_EX32(s->regs[R_ROT_CREATOR_AUTH_CODESIGN_READ_LOCK],
-                                        READ_LOCK);
+            rdaccess = (bool)SHARED_FIELD_EX32(
+                s->regs[R_ROT_CREATOR_AUTH_CODESIGN_READ_LOCK], READ_LOCK);
             break;
         case OTP_PART_ROT_CREATOR_AUTH_STATE:
-            rdaccess =
-                (bool)SHARED_FIELD_EX32(s->regs[R_ROT_CREATOR_AUTH_STATE_READ_LOCK],
-                                        READ_LOCK);
+            rdaccess = (bool)
+                SHARED_FIELD_EX32(s->regs[R_ROT_CREATOR_AUTH_STATE_READ_LOCK],
+                                  READ_LOCK);
             break;
         case OTP_PART_SECRET0:
         case OTP_PART_SECRET1:
@@ -852,16 +853,23 @@ static uint64_t ot_otp_eg_reg_read(void *opaque, hwaddr addr, unsigned size)
                        32u);
         break;
     case R_ROT_CREATOR_AUTH_CODESIGN_DIGEST_0:
-        val32 = (uint32_t)ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_ROT_CREATOR_AUTH_CODESIGN);
+        val32 = (uint32_t)
+            ot_otp_eg_swcfg_get_part_digest(s,
+                                            OTP_PART_ROT_CREATOR_AUTH_CODESIGN);
         break;
     case R_ROT_CREATOR_AUTH_CODESIGN_DIGEST_1:
-        val32 = (uint32_t)(ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_ROT_CREATOR_AUTH_CODESIGN) >> 32u);
+        val32 = (uint32_t)(ot_otp_eg_swcfg_get_part_digest(
+                               s, OTP_PART_ROT_CREATOR_AUTH_CODESIGN) >>
+                           32u);
         break;
     case R_ROT_CREATOR_AUTH_STATE_DIGEST_0:
-        val32 = (uint32_t)ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_ROT_CREATOR_AUTH_STATE);
+        val32 = (uint32_t)
+            ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_ROT_CREATOR_AUTH_STATE);
         break;
     case R_ROT_CREATOR_AUTH_STATE_DIGEST_1:
-        val32 = (uint32_t)(ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_ROT_CREATOR_AUTH_STATE) >> 32u);
+        val32 = (uint32_t)(ot_otp_eg_swcfg_get_part_digest(
+                               s, OTP_PART_ROT_CREATOR_AUTH_STATE) >>
+                           32u);
         break;
     case R_HW_CFG0_DIGEST_0:
         val32 = (uint32_t)ot_otp_eg_swcfg_get_part_digest(s, OTP_PART_HW_CFG0);
@@ -1168,7 +1176,8 @@ static void ot_otp_eg_load_hw_cfg(OtOTPEgState *s)
     memset(hw_cfg->soc_dbg_state, 0, sizeof(hw_cfg->soc_dbg_state));
     hw_cfg->en_sram_ifetch = (uint8_t)otp->data[R_EN_SRAM_IFETCH];
 
-    entropy_cfg->en_csrng_sw_app_read = (uint8_t)otp->data[R_EN_CSRNG_SW_APP_READ];
+    entropy_cfg->en_csrng_sw_app_read =
+        (uint8_t)otp->data[R_EN_CSRNG_SW_APP_READ];
 }
 
 static void ot_otp_eg_ctrl_get_lc_info(
@@ -1374,10 +1383,7 @@ static void ot_otp_eg_realize(DeviceState *dev, Error **errp)
     OtOTPEgState *s = OT_OTP_EG(dev);
     (void)errp;
 
-    if (!s->ot_id) {
-        s->ot_id =
-            g_strdup(object_get_canonical_path_component(OBJECT(s)->parent));
-    }
+    g_assert(s->ot_id);
 
     ot_otp_eg_load(s, &error_fatal);
 }