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Pull requests: intel/intel-xpu-backend-for-triton

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Pull requests list

[TritonGEN] Use the sub-group-size of the module instead of hard code number of 16 in block load.
#4764 opened Jul 22, 2025 by chengjunlu Loading…
[TritonGEN] Update the unsupported block load SPV interface list.
#4763 opened Jul 22, 2025 by chengjunlu Loading…
5
Test CI
#4752 opened Jul 21, 2025 by wdziurdz • Draft
7 tasks
[RemoveLayout] Remove convert layout op for any layout if the user is tt.store with block pointer
#4751 opened Jul 21, 2025 by chengjunlu Loading…
5
Fixed FP to FP8 downcast
#4748 opened Jul 18, 2025 by AndreyPavlenko Loading…
1
Add new tests in test_frontend.py
#4742 opened Jul 17, 2025 by etiotto Loading…
@etiotto
1
[FlexDecoding] Support M < 8 tt.dot with DPAS to optimize the flex decoding performance.
#4727 opened Jul 16, 2025 by chengjunlu Loading…
1
13
[DRAFT][BENCHMARK] Reuse CUTLASS's gemm configuration file
#4720 opened Jul 15, 2025 by jle-quel • Draft
[TEST] Update BMG skiplist
#4718 opened Jul 15, 2025 by whitneywhtsang • Draft
1
@whitneywhtsang
2
[DRAFT] Refactor the 2D block load lowering.
#4615 opened Jul 4, 2025 by chengjunlu • Draft
2
[DRAFT] Subgroup 2D Block IO lowering example for AxB GEMM
#4608 opened Jul 2, 2025 by alexbaden • Draft
[EXPERIMENTAL]: Load column major matrix with 2d block io
#4604 opened Jul 2, 2025 by chengjunlu • Draft
1
3
Revert "[DEBUG] Revert "Enable SPV_INTEL_fp_fast_math_mode (#4058)"(#4473)"
#4576 opened Jun 26, 2025 by anmyachev Loading…
1
24
[DEBUG] Source kernel version for 09 tutorial from ARL-H machine
#4570 opened Jun 25, 2025 by anmyachev • Draft
Run CI for stacked/** branches
#4557 opened Jun 23, 2025 by kwasd • Draft
4
Store transpose attribute in Subgroup2DBlockIO layouts
#4549 opened Jun 20, 2025 by alexbaden • Draft
1
[Draft] [BACKEND] Enhance the remove layout implementation to reduce the duplicated values with different layout in scf.for.
#4527 opened Jun 18, 2025 by chengjunlu • Draft
1
[FlashAttention] Remove XeTLA for fwd mode
#4524 opened Jun 18, 2025 by whitneywhtsang • Draft
@whitneywhtsang
2
[FlashAttention] Sync from upstream tensor desc implementation (part 3)
#4520 opened Jun 17, 2025 by whitneywhtsang • Draft
@whitneywhtsang
1
Use the Subgroup 2D Block Encoding in LoadStoreOpToLLVM
#4500 opened Jun 13, 2025 by alexbaden • Draft
1
1
Clean up Intel specific code in the common TritonGPU dialect source file. upstream: triton
#4469 opened Jun 10, 2025 by chengjunlu • Draft
1
@chengjunlu
5
Convert block ptr type layouts to Subgroup2DBlockEncoding layouts
#4463 opened Jun 9, 2025 by alexbaden • Draft
1
68
[DEBUG] Try run FlexAttn in parallel
#4376 opened May 30, 2025 by anmyachev • Draft
6
Do not use extractvalue if the inserted value is directly reachable
#4212 opened May 15, 2025 by AndreyPavlenko • Draft
7
Use inline VISA to optimize horizontal batched subgroup reduce
#4171 opened May 12, 2025 by chengjunlu • Draft
8
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