- AY19/20 EEE FYP A2068-191
Install pandas in order for algorithm to operate as intended
pip install pandas
pip install tqdm
Netlists (Clean/Edited) should be placed in '.\Netlist' directory
Modify netlist to suit current library prior to usage
AND -> HS65_LH_AND2X4 (.Z(c), .A(a), .B(b) )
OR -> HS65_LH_OR2X4 (.Z(c), .A(a), .B(b) )
NAND -> HS65_LH_NAND2X2 (.Z(c), .A(a), .B(b) )
NOR -> HS65_LH_NOR2X2 (.Z(c), .A(a), .B(b) )
XOR -> HS65_LHS_XOR2X3 (.Z(c), .A(a), .B(b) )
XNOR -> HS65_LHS_XNOR2X3 (.Z(c), .A(a), .B(b) )
DFF -> HS65_LH_DFPRQX4 (.D(d), .CP(CLK), .RN(RST), .Q(q) )
NOT -> HS65_LH_IVX2 (.Z(b), .A(a) )
Change the logic gate types and inputs based on the original logic gates
Remove all sub-modules, leaving only the main module intact
Flip-flop modules, etc, are not needed in this analysis
Move flip-flops and inverters to the end of the list of logic gates to ensure that algorithm works
If in doubt, use existing files in '.\Netlist' as reference
Hands-on guide on executing Camouflage and Attack
Run main.py
python main.py
Following prompt will appear:
Choose 1 to camouflage, 2 to attack the logic circuit
Select 1 or 2 depending on user
Next prompt will ask user to choose clean netlist from '.\Netlist' directory
Select clean file:
If 1 is selected, prompt will request for user-inputted percentage of logic gates to be camouflage
State percentage of gates to be camouflaged.\n
Default choice is 10% of total logic gates. (%):
As stated in prompt, default is 10%
Optimal choice of logic gates to be camouflaged is rendered through the analysis of the output corruptibility
Total number of logic gates that is camouflaged will be prompted, along with the logic gates' details
If 2 is selected, prompt will ask user to choose camouflaged netlist from '.\Netlist' directory
Select Camo file:
Prompt will request user to choose logic gate types to be used in the attack
Please input the camouflaged gate combinations, one at a time.
1 - AND
2 - NAND
3 - OR
4 - NOR
5 - XOR
6 - XNOR
7 - End
Each logic gate type only needs to be chosen once as all the possible combinations will be analyzed
Current rendition of brute force attack algorithm eliminates combinations that produces wrong set of output bits at every input combination
All possible logic gate combinations will be prompted once the attack analysis is completed
The total number of tries and logic gate combinations will also be prompted
Total time used to execute each process will be prompted after the process is completed
Camouflage logic gates based on pre-determined pattern
AND <-> NOR
OR <-> NAND
XOR <-> XNOR
Logic gates are chosen based on their output corruptibility (Number of bits that are different from original/Total bits)
Highest output corruptibility will be chosen to be camouflaged
Output corruptibility will only be calculated once, regardless of number of logic gates needed to be camouflaged
Number of logic gates to be camouflaged = user-inputted % of total number of logic gates
Example:
- 3 logic gates need to be camouflaged
Logic gates with top 3 output corruptibility will be chosen
Attacking camouflaged logic circuit to reveal original functionality of camouflaged logic gates
2 possible methods -
- Process one camouflage gate combination at a time after comparing all outputs with expected outputs
- Process all camouflage gate combination for each input combination after comparing the outputs with expected outputs and eliminate those that are different
Method 2 is faster than method 1
Allowing selection of logic gates that could be the correct gate
1. AND
2. NAND
3. OR
4. NOR
5. XOR
6. XNOR
Process flow will be the same as before, but with the removal of the pre-determined pattern
Current attack algorithm utilizes elimination of non-viable logic gate combinations to reduce total execution time
Previous attack algorithm performs a full iteration of all logic gate combinations
Full iteration algorithm can be analyzed here
Flip-flop implemented as a sequential buffer, instead of a clock-based buffer
Outputs produced might not be completely correct, if circuit is unable to stabilize before simulation cycle upper limit is reached
Long runtime due to metastability analysis can also be eliminated when a global clock is implemented
Analyze suitability for logic gates to be camouflaged with relation to each other
Compounded output corruptibility calculation instead of current simple one
Produces cascaded camouflaged logic gates, which affect each other's inputs/outputs
Example:
- Recalculate output corruptibility whenever a logic gate is chosen to be camouflaged
- If 3 logic gates are needed to be camouflaged, initial output corruptibility list will be used to choose first gate
- Subsequent chosen logic gate will be determined by recalculating the output corruptibility list, while taking into account the modified logic gate
Implement camouflaged logic gate sensitization
Sensitization is the process in which the primary inputs are traced towards the camouflaged logic gates' inputs, and the primary outputs are traced backwards to the camouflaged logic gates' outputs
This helps to determine the complete or partial functionality of the camouflaged logic gates
However, sensitization is only to reveal the partial functionality of cascaded camouflaged logic gates
Implement logic gate attack combination generation based on logic gate types shown in netlist
Example:
- Current algorithm generates all logic gate types for all camouflaged gates regardless of whether camouflaged gate is of that logic gate type
User-input: 1 2 3 4 5 6- User-input shown above will always generate logic gate combinations for all six logic gate types
- Proposed algorithm will generate logic gate types for camouflaged gates based on their logic gate types shown in netlist
AND/XOR NOR/NAND OR/XNOR- Logic gate types shown above will only generate logic gate combinations based on the valid logic gate types
- In this example, the first logic gate will only be tested for AND and XOR logic gates, the second will be tested for NOR and NAND logic gates and the third will be tested for OR and XNOR logic gates
Implementation of CPU Parallel Processing or GPU Processing to reduce the execution time
CPU excels in doing multiple tasks at the same time, while GPU excels in doing one task very quickly