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[YXI] YXI Generated AXI Wrapper Only Works With Memories of Width 32b
AMC
Needed for Andrew's memory compiler
#2291
opened Sep 26, 2024 by
andrewb1999
[YXI] YXI AXI Wrapper Does Not Copy Over Components Other Than Main
AMC
Needed for Andrew's memory compiler
Type: Bug
Bug in the implementation
#2290
opened Sep 26, 2024 by
andrewb1999
cell-share
Needs a Timing-Based Heuristic or Cost Model
AMC
#2021
opened Apr 24, 2024 by
andrewb1999
Do a Better Job At Removing Default Zero Assignments
AMC
Needed for Andrew's memory compiler
#2011
opened Apr 22, 2024 by
andrewb1999
Calyx does not correctly support zero bit values
AMC
Needed for Andrew's memory compiler
S: Discussion needed
Issues blocked on discussion
#1866
opened Jan 23, 2024 by
andrewb1999
Run CIRCT Integration Tests in CI
AMC
Needed for Andrew's memory compiler
C: CIRCT
Changes for the CIRCT backend
#1608
opened Jul 16, 2023 by
andrewb1999
Issues with the AXI implementation
C: FPGA
Changes for the FPGA backend
Type: Tracker
Track various tasks
#1071
opened Jul 1, 2022 by
andrewb1999
[fud] xclbin stage should use Xilinx paths, etc., from the configuration rather than hard-coding them
C: FPGA
Changes for the FPGA backend
C: fud
Calyx Driver
S: Available
Can be worked upon
#1037
opened Jun 14, 2022 by
andrewb1999
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