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Library fixes for teensy 3.1 and latest Teensyduino #5

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Library fixes for teensy 3.1 and latest Teensyduino #5

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4 changes: 2 additions & 2 deletions t3spi.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15,13 +15,13 @@ T3SPI::T3SPI() {

void T3SPI::begin_MASTER() {
setMCR(MASTER);
setCTAR(CTAR0,8,SPI_MODE0,LSB_FIRST,SPI_CLOCK_DIV8);
setCTAR(CTAR_0,8,SPI_MODE0,LSB_FIRST,SPI_CLOCK_DIV8);
enablePins(SCK, MOSI, MISO, CS0, CS_ActiveLOW);
}

void T3SPI::begin_MASTER(uint8_t sck, uint8_t mosi, uint8_t miso, uint8_t cs, bool activeState){
setMCR(MASTER);
setCTAR(CTAR0,8,SPI_MODE0,LSB_FIRST,SPI_CLOCK_DIV8);
setCTAR(CTAR_0,8,SPI_MODE0,LSB_FIRST,SPI_CLOCK_DIV8);
enablePins(sck, mosi, miso, cs, activeState);
}

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12 changes: 6 additions & 6 deletions t3spi.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,8 +26,8 @@
#define MSB_FIRST 0
#define LSB_FIRST 1

#define CTAR0 0
#define CTAR1 1
#define CTAR_0 0
#define CTAR_1 1
#define CTAR_SLAVE 2

#define SCK 0x0D
Expand Down Expand Up @@ -59,17 +59,17 @@



#define SPI_WRITE_8(c,CTARn, PCS) \
#define SPI_WRITE_8(c,CTARn, PCS) \
do { \
while ((SPI0_SR & SPI_SR_TXCTR) >= 0x00004000); \
SPI0_PUSHR = ((c)&0xff) | SPI0_PUSHR_CTAS(CTARn) | SPI0_PUSHR_PCS(0x1f & PCS); \
SPI0_PUSHR = ((c)&0xff) | SPI_PUSHR_CTAS(CTARn) | SPI_PUSHR_PCS(0x1f & PCS); \
} while(0)


#define SPI_WRITE_16(w,CTARn, PCS) \
#define SPI_WRITE_16(w,CTARn, PCS) \
do { \
while ((SPI0_SR & SPI_SR_TXCTR) >= 0x00004000); \
SPI0_PUSHR = ((w)&0xffff) | SPI0_PUSHR_CTAS(CTARn) | SPI0_PUSHR_PCS(0x1f & PCS); \
SPI0_PUSHR = ((w)&0xffff) | SPI_PUSHR_CTAS(CTARn) | SPI_PUSHR_PCS(0x1f & PCS); \
} while(0)


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