feat(tricore): Initial tricore support by miguelafsilva5 · Pull Request #242 · bao-project/bao-hypervisor

miguelafsilva5 · 2025-08-29T14:03:37Z

PR Description

This PR introduces the initial support for Infineon Tricore architectures.
This PR requires #218 to support boot from flash with a non-unified memory model.
The current state of this port supports baremetal and freeRTOS guests in single or multicore setups. At the moment, each guest is given an unique ID, and each core only executes one guest.

The following list shows what is missing:

DMA virtualization/isolation
History re-write and commit clean up
CI integration
bao-demos integration

miguelafsilva5 · 2026-02-17T15:03:53Z

@DavidMCerdeira finished attending to your review. When you have the time, check the missing conversations and see if everything is OK.
Also added an additional commit to fix the fomatting.
@josecm when David green lights his review, you can start yours

josecm · 2026-02-18T12:31:09Z

@josecm when David green lights his review, you can start yours

I will provide my review no later than the beginning of next week.

DavidMCerdeira · 2026-02-18T13:12:19Z

@miguelafsilva5 feel free to squash these commits into one to cleanup the history

miguelafsilva5 · 2026-02-18T13:20:55Z

@DavidMCerdeira Squashed everything. All checks are green.
@josecm should be ready for your review. Thank you

josecm · 2026-02-18T13:22:19Z

@DavidMCerdeira Squashed everything. All checks are green.
@josecm should be ready for your review. Thank you

This is great! I will try to provide some feedback this week still!

src/arch/tricore/boot.S

DavidMCerdeira · 2026-02-19T14:32:34Z

src/arch/tricore/inc/arch/ir.h

+
+#include <bao.h>
+#include <platform.h>
+#include "prot.h"


Done in f2876bf

DavidMCerdeira · 2026-02-19T14:57:02Z

src/arch/tricore/vm.c

+    unsigned long pcxs =
+        bit32_extract((uint32_t) & (vcpu->regs.upper_ctx), ADDR_PCXS_OFF, ADDR_PCXS_LEN);
+
+    vcpu->regs.lower_ctx.pcxi = (1 << 21) | (1 << PCXI_UL_OFF) | (pcxs << PCXI_PCXS_OFF) | pcxo;


magic number

Done in 62d938a

DavidMCerdeira · 2026-02-19T14:57:15Z

src/arch/tricore/vm.c

+    vcpu->regs.lower_ctx.pcxi = (1 << 21) | (1 << PCXI_UL_OFF) | (pcxs << PCXI_PCXS_OFF) | pcxo;
+    vcpu->regs.lower_ctx.a11 = vm->config->entry;
+
+    vcpu->regs.upper_ctx.csa_psw = 2 << 10;


magic number

Done in 62d938a

DavidMCerdeira · 2026-02-19T14:58:35Z

Makefile

 		-Wswitch-default -Wshadow -Wshadow=global \
 		-Wcast-qual -Wunused-macros \
-		-Wstrict-prototypes -Wunused-but-set-variable
+		-Wstrict-prototypes -Wunused-but-set-variable 


Done in 14572b6

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

miguelafsilva5 force-pushed the feat/tricore branch 2 times, most recently from f92535a to 57284c8 Compare September 1, 2025 14:05

danielRep force-pushed the feat/non-unified-mem branch from 9ad59e5 to 474545c Compare September 1, 2025 15:56

miguelafsilva5 force-pushed the feat/tricore branch 2 times, most recently from b9e1caf to 7da4f29 Compare September 3, 2025 12:51

danielRep force-pushed the feat/non-unified-mem branch 2 times, most recently from 829c219 to 61b37aa Compare September 3, 2025 13:06

miguelafsilva5 force-pushed the feat/tricore branch 4 times, most recently from 0e5ea75 to bf61453 Compare September 8, 2025 09:37

danielRep force-pushed the feat/tricore branch from bf61453 to 20a40db Compare September 8, 2025 10:03

danielRep force-pushed the feat/non-unified-mem branch 2 times, most recently from 674ffd5 to 3d1e91a Compare September 8, 2025 11:01

miguelafsilva5 force-pushed the feat/tricore branch from 20a40db to fd1cd5d Compare September 8, 2025 12:06

danielRep force-pushed the feat/non-unified-mem branch from 3d1e91a to 53e6ea9 Compare September 9, 2025 13:40

miguelafsilva5 force-pushed the feat/tricore branch 2 times, most recently from 44a2cbb to 3d6619f Compare September 10, 2025 10:18

danielRep force-pushed the feat/non-unified-mem branch from 04f6748 to 1a50d5c Compare September 10, 2025 11:00

miguelafsilva5 force-pushed the feat/tricore branch from 3d6619f to 1e889fb Compare September 10, 2025 11:03

Base automatically changed from feat/non-unified-mem to main September 10, 2025 13:32

miguelafsilva5 force-pushed the feat/tricore branch 6 times, most recently from bffccac to 661df87 Compare September 15, 2025 13:43

miguelafsilva5 force-pushed the feat/tricore branch 2 times, most recently from ba20ef7 to f2194f5 Compare September 24, 2025 10:31

miguelafsilva5 force-pushed the feat/tricore branch from f2194f5 to f245bf9 Compare October 2, 2025 14:50

miguelafsilva5 force-pushed the feat/tricore branch 5 times, most recently from fe4c0f2 to d72e265 Compare February 16, 2026 17:17

miguelafsilva5 force-pushed the feat/tricore branch from 52c4d11 to 59f2a9d Compare February 18, 2026 11:02

miguelafsilva5 force-pushed the feat/tricore branch from 3addc51 to f7b660a Compare February 18, 2026 13:18

DavidMCerdeira self-requested a review February 18, 2026 13:21

DavidMCerdeira reviewed Feb 18, 2026

View reviewed changes

src/arch/tricore/boot.S Outdated Show resolved Hide resolved

DavidMCerdeira reviewed Feb 18, 2026

View reviewed changes

src/arch/tricore/boot.S Outdated Show resolved Hide resolved

DavidMCerdeira reviewed Feb 18, 2026

View reviewed changes

src/arch/tricore/boot.S Outdated Show resolved Hide resolved

DavidMCerdeira self-requested a review February 19, 2026 14:30

DavidMCerdeira reviewed Feb 19, 2026

View reviewed changes

miguelafsilva5 force-pushed the feat/tricore branch from fe66d1e to 363f166 Compare February 19, 2026 14:33

DavidMCerdeira reviewed Feb 19, 2026

View reviewed changes

miguelafsilva5 added 3 commits February 19, 2026 15:24

feat(tricore): Initial commit

1b660ae

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

ref(includes): change includes to use <>

f2876bf

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

ref(magic-numbers): remove initial CSA state magic numbers

62d938a

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

miguelafsilva5 force-pushed the feat/tricore branch from fe9902a to 62d938a Compare February 19, 2026 15:25

miguelafsilva5 added 3 commits February 19, 2026 15:26

ref(space): remove extra space

14572b6

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

ref(format): fix formatting

7eca26a

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

feat(workflow): add tricore workflow

6589ce5

Signed-off-by: Miguel Silva <miguelafsilva5@gmail.com>

miguelafsilva5 force-pushed the feat/tricore branch from 25823c3 to 6589ce5 Compare February 19, 2026 15:59

DavidMCerdeira self-assigned this Feb 20, 2026

Comments

Conversation

miguelafsilva5 commented Aug 29, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

PR Description

Uh oh!

miguelafsilva5 commented Feb 17, 2026

Uh oh!

josecm commented Feb 18, 2026

Uh oh!

DavidMCerdeira commented Feb 18, 2026

Uh oh!

miguelafsilva5 commented Feb 18, 2026

Uh oh!

josecm commented Feb 18, 2026

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

3 participants

miguelafsilva5 commented Aug 29, 2025 •

edited

Loading