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drivers: clock_control: nrf2_fll16m: use HAL #90056

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10 changes: 7 additions & 3 deletions drivers/clock_control/clock_control_nrf2_fll16m.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,10 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
#define FLL16M_MODE_CLOSED_LOOP 1
#define FLL16M_MODE_BYPASS 2
#define FLL16M_MODE_DEFAULT FLL16M_MODE_OPEN_LOOP
#define FLL16M_MODE_LOOP_MASK BIT(0)

BUILD_ASSERT(FLL16M_MODE_OPEN_LOOP == NRF_LRCCONF_CLK_SRC_OPEN_LOOP);
BUILD_ASSERT(FLL16M_MODE_CLOSED_LOOP == NRF_LRCCONF_CLK_SRC_CLOSED_LOOP);

#define FLL16M_HFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, hfxo)

Expand Down Expand Up @@ -65,13 +69,13 @@ struct fll16m_dev_config {

static void activate_fll16m_mode(struct fll16m_dev_data *dev_data, uint8_t mode)
{
/* TODO: change to nrf_lrcconf_* function when such is available. */

if (mode != FLL16M_MODE_DEFAULT) {
soc_lrcconf_poweron_request(&dev_data->fll16m_node, NRF_LRCCONF_POWER_MAIN);
}

NRF_LRCCONF010->CLKCTRL[0].SRC = mode;
nrf_lrcconf_clock_source_set(NRF_LRCCONF010, 0,
(nrf_lrcconf_clk_src_t)(mode & FLL16M_MODE_LOOP_MASK),
(mode == FLL16M_MODE_BYPASS));

if (mode == FLL16M_MODE_DEFAULT) {
soc_lrcconf_poweron_release(&dev_data->fll16m_node, NRF_LRCCONF_POWER_MAIN);
Expand Down