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This patch adds full low-power support to STM32F3 in Zephyr, including:

STOP0 & STOP1 modes (with main/LP regulator)
STANDBY (poweroff) mode
Wakeup pin (PA0) support
SoC clock reinitialization on wakeup
Idle timer using RTC
Samples updated to test wakeup pin and poweroff

This is a significant power-management enablement patch for the STM32F3 series.

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Hello @albayenes, and thank you very much for your first pull request to the Zephyr project!
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@oflifurkan
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Looks good to me!

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@dsseng dsseng left a comment

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Thank you for your contribution, this is very valuable for other STM32F3 users out there.

Could you please take a look at my comments related to the commit scope and code style?

Also, please sign-off the commits, please find the information in the Contribution Guidelines

@albayenes albayenes force-pushed the stm32f3_pm branch 3 times, most recently from f5e8456 to b68ff3f Compare November 30, 2025 03:10
@albayenes
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@dsseng I completed your requirements. Thanks for your review. Could you check it?

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Thanks, looks good and ready for review by the maintainers

@albayenes albayenes force-pushed the stm32f3_pm branch 3 times, most recently from a3253aa to 41f5cc1 Compare December 1, 2025 08:19
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@etienne-lms etienne-lms left a comment

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Thanks for the changes. Some comments for consistency among STM32 SoCs.

Nitpicking on the commit message: could you refine the header line, and remove heading indentation in the message body?

-pm: Add power management for stm32f3x
+soc: st: stm32f3: Add power management
 
-    Adds full low-power support to STM32F3 in Zephyr, including:
+Add full low-power support to STM32F3 in Zephyr, including
 (...)

Adds full low-power support to STM32F3 in Zephyr, including:

STOP0 & STOP1 modes (with main/LP regulator)
STANDBY (poweroff) mode
Wakeup pin (PA0) support
SoC clock reinitialization on wakeup
Idle timer using RTC
Samples updated to test wakeup pin and poweroff

This is a significant power-management enablement
patch for the STM32F3 series.

Tested on: NUCLEO-F302R8 board.

Signed-off-by: Enes Albay <[email protected]>
@sonarqubecloud
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sonarqubecloud bot commented Dec 1, 2025

@albayenes albayenes requested a review from etienne-lms December 1, 2025 12:04
Comment on lines +17 to +19
config PM
select COUNTER
select COUNTER_RTC_STM32_SUBSECONDS
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I think a prefer way is to not have symbols definitions here but rather

configdefault COUNTER
	y if PM

configdefault COUNTER_RTC_STM32_SUBSECONDS
	y if PM

Or

if PM

configdefault COUNTER
	y

configdefault COUNTER_RTC_STM32_SUBSECONDS
	y

endif # PM

Comment on lines +7 to +10
#include <stm32_ll_cortex.h>
#include <stm32_ll_pwr.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/poweroff.h>
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Suggested change
#include <stm32_ll_cortex.h>
#include <stm32_ll_pwr.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/poweroff.h>
#include <stm32_common.h>
#include <stm32_ll_pwr.h>

compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
substate-id = <0>;
min-residency-us = <1000000>;
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I think that's a bit too much. I would mean no sleeping unless the system has nothing to do for the next 1sec time window.

From a few stm32f3 datasheets, the SoC wakeup time seems around a dozen on µs. Assuming the exit latency is 400µs (could be refined later if needed), I think 500µs of min residency delay should be far enough.

gpio_keys {
wkup_button: wkup {
label = "WKUP";
gpios = <&gpioa 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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I find this reference strange. If needing to manually wire to pin PA0, like for nucleo_f103rb, could you add an inline comment to mention it?

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Well, I gave it a try. The system powers back when pin A0 (e.g. connector CN7[28]) is connected to 3V3 supply (e.g. CN7[16]). From reference manual, WKUP pins wake the system on rising edge only.

Suggested change
gpios = <&gpioa 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
/*
* PA0 is not connected to any button: you must connect it to Vdd (+3.3V)
* using a jumper wire. For example, wiring PA0 CN7[28] (PA0) to CN7[16]
*/
gpios = <&gpioa 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;

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6 participants