stm32cube: stm32n6: Allow building a chainloaded secure application

stm32cube/stm32n6xx/CMakeLists.txt

@@ -1,8 +1,13 @@
 # Copyright (c) 2025 STMicroelectronics
 #
 # SPDX-License-Identifier: Apache-2.0
-
-zephyr_library_sources(soc/system_stm32n6xx_fsbl.c)
+if(CONFIG_BOOTLOADER_MCUBOOT)
+	zephyr_include_directories(soc)
+	zephyr_include_directories(soc/Templates)
+	zephyr_library_sources(soc/system_stm32n6xx_s.c)
+else()
+	zephyr_library_sources(soc/system_stm32n6xx_fsbl.c)
+endif()
 zephyr_library_sources(drivers/src/stm32n6xx_hal.c)
 zephyr_library_sources(drivers/src/stm32n6xx_hal_rcc.c)
 zephyr_library_sources(drivers/src/stm32n6xx_hal_rcc_ex.c)

stm32cube/stm32n6xx/README

@@ -52,11 +52,19 @@ Patch List:
      which we don't need right now.
     Impacted files:
     -soc/system_stm32n6xx_fsbl.c
+    -soc/system_stm32n6xx_s.c
 
    *Fix SDIO initialization failure when skipping card identification sequence
      Fixes an issue in the STM32HN6 SDIO driver where HAL_SDIO_Init() fails if
      the card identification sequence is skipped.
      Impacted files:
       stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_sdio.c
 
+   *Fix XSPIM initialization sequence
+     Don't cut XSPI2(ext NOR) clock when initializing XSPI1(PSRAM) which doesn't work
+     when application is running in XIP on external NOR
+    Impacted files:
+      stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_xspi.c
+    Internal reference: 212765
+
    See release_note.html from STM32Cube

stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_xspi.c

@@ -2805,27 +2805,27 @@ HAL_StatusTypeDef HAL_XSPIM_Config(XSPI_HandleTypeDef *const hxspi, XSPIM_CfgTyp
   }
 
   /********** Disable all XSPI to configure XSPI IO Manager **********/
-  if (__HAL_RCC_XSPI1_IS_CLK_ENABLED() != 0U)
+  if ((__HAL_RCC_XSPI1_IS_CLK_ENABLED() != 0U) && (hxspi->Instance == XSPI1))
   {
     if ((XSPI1->CR & XSPI_CR_EN) != 0U)
     {
       CLEAR_BIT(XSPI1->CR, XSPI_CR_EN);
       xspi_enabled |= 0x1U;
     }
   }
-  if (__HAL_RCC_XSPI2_IS_CLK_ENABLED() != 0U)
+  if ((__HAL_RCC_XSPI2_IS_CLK_ENABLED() != 0U) && (hxspi->Instance == XSPI2))
   {
     if ((XSPI2->CR & XSPI_CR_EN) != 0U)
     {
       CLEAR_BIT(XSPI2->CR, XSPI_CR_EN);
       xspi_enabled |= 0x2U;
     }
   }
-  if (__HAL_RCC_XSPI3_IS_CLK_ENABLED() != 0U)
+  if ((__HAL_RCC_XSPI3_IS_CLK_ENABLED() != 0U) && (hxspi->Instance == XSPI3))
   {
     if ((XSPI3->CR & XSPI_CR_EN) != 0U)
     {
-      CLEAR_BIT(XSPI2->CR, XSPI_CR_EN);
+      CLEAR_BIT(XSPI3->CR, XSPI_CR_EN);
       xspi_enabled |= 0x4U;
     }
   }

stm32cube/stm32n6xx/soc/system_stm32n6xx_s.c

@@ -425,7 +425,7 @@ void SystemCoreClockUpdate(void)
   *         other parameters.
   * @retval SystemCoreClock value
   */
-CMSE_NS_ENTRY uint32_t SECURE_SystemCoreClockUpdate(void)
+uint32_t SECURE_SystemCoreClockUpdate(void)
 {
   SystemCoreClockUpdate();