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This PR removes a logits processor that does nothing. Probably something legacy from V0. The logits processor currently is called in this snippet from spyre_model_runner:

# Sample the next token.
        output: SamplerOutput = self.model.sample(
            logits=logits,
            sampling_metadata=self.get_sampling_metadata(is_prefill),
        )

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👋 Hi! Thank you for contributing to vLLM support on Spyre.
Just a reminder: Make sure that your code passes all the linting checks, otherwise your PR won't be able to be merged. To do so, first install the linting requirements, then run format.sh and commit the changes. This can be done with uv directly:

uv sync --frozen --group lint --active --inexact

Or this can be done with pip:

uv pip compile --group lint > requirements-lint.txt
pip install -r requirements-lint.txt
bash format.sh

Now you are good to go 🚀

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bot:test

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@joerunde joerunde left a comment

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🔥🔥🔥!

lpgtm

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@maxdebayser maxdebayser left a comment

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Useless code hiding in plain sight :D

@wallashss wallashss merged commit 53d9307 into main Oct 13, 2025
21 checks passed
@wallashss wallashss deleted the wallas-rm-lp branch October 13, 2025 13:52
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3 participants