Backend

Workflow

First set CHIPLAB_HOME to this repo, and put some necessary files into toolchains/ (see chiplab doc)

# elaborate chisel
make verilog

# complie dpi (for simulate frontend send inst, use dpi)
make dpi-lib DESIGN=backend

# complie testbench (with difftest)
cd ./sims/verilator/run_prog
./configure.sh --run coremark --output-pc-info --dump-fst --tail-waveform --waveform-tail-size 10000
make -j$(nproc)

# run testbench
cd ./sims/verilator/run_prog
make run 2> sim.md # and use markdown renderer to read

# view waveform
gtkwave ./sims/verilator/run_prog/log/{test_name}/simu_trace.fst