feat(differentialpair): add routing geometry constraints (gap, traceWidth, layer, sameLayer) - #830
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pinCount was declared as a bare z.number(), accepting fractional, zero, negative, and infinite values. A fractional count produced a header whose port count and pad count disagree, while zero/negative counts surfaced later as an unrelated pcb_missing_footprint_error. Validate pinCount with z.number().int().positive() so invalid values are rejected at parse time with a message naming the prop, matching the existing idiom in connector.ts and analogacsweepsimulation.ts.
…idth, layer, sameLayer) (tscircuit#743)
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Hi maintainers, pinging to keep this PR active — it is still tested, relevant and ready for review whenever you have time. Thank you! |
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Still relevant — keeping active per contribution guidelines. |
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This PR has been automatically marked as stale because it has had no recent activity. It will be closed if no further activity occurs. |
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Hi maintainers, pinging to keep this PR active — it is still tested, relevant and ready for review whenever you have time. Thank you! |
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This PR has been automatically marked as stale because it has had no recent activity. It will be closed if no further activity occurs. |
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Hi maintainers, pinging to keep this PR active — it is still tested, relevant and ready for review whenever you have time. Thank you! |
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Summary
Fixes #743.
Adds optional routing geometry constraints to
DifferentialPairPropsanddifferentialPairProps:pcbTraceWidthand aliastraceWidth: explicit trace width for pair memberslayer: target / preferred routing layerpcbAllowedLayers: allowed PCB layers for routing the pairsameLayer: enforce routing both pair traces on the same layermatchViaTransitions: match layer via transitions between pair membersIncludes unit tests in
tests/differential-pair-routing-geometry.test.tsand updated generated documentation.