Preserve pad geometry and repair constrained via clearances

[imrishabh18]

Rotated pads were checked as axis-aligned copper, and some repair candidates moved a via away from one trace into another. The route converter also skipped the outgoing wire immediately after a via, so that copper was missing from the DRC input.

Preserve the original pad dimensions and rotation in the checker and Circuit JSON conversion. Use transformation-matrix for coordinate transforms and @tscircuit/math-utils for geometry; there are no stored sine/cosine fields. Candidate construction keeps the existing routing obstacles. The repair does not change obstacle approximations or topology construction.

The repair now checks both wires adjoining a via and considers the clearance boundaries of neighboring traces when moving it. Pad checks cover every layer traversed by the via. Existing local displacement candidates remain available when unrelated DRC errors are present, within the same candidate limit. Newly introduced wires and vias must also respect the board outline. Terminal escape candidates retain the existing selection order and full-board DRC acceptance.

This PR is based on tests-only PR #98, stacked on the upstream stage-handoff fix #97. It keeps a small set of real-SRJ regressions: SRJ18 samples 5 and 9, plus the existing dataset01 circuit143 test. Their actual routed output is snapshotted. The existing converter test also checks the outgoing wire after a via.

The same real SRJ18 sample 9 input shows 15 remaining DRC errors → 0, preserving all 256 routes and their endpoints. With the corrected pad geometry and via conversion, its initial count is 8.

Before this fix — 15 remaining DRC errors	After this fix — 0 DRC errors

Both snapshots render the same original pad outlines, including the rotated pads around the central chip. The checker now measures those outlines correctly.

Validation at 37d2b7af008c3a79c1a794e2ca307583a0f19c98:

• All 91 tests and TypeScript pass locally on macOS and Linux. CI tests, TypeScript, and formatting pass on this commit. Updated real-SRJ snapshots were visually reviewed.
• The complete bugreport94 pipeline produces all 157 routes with zero physical DRC errors using the original topology and routing grid.
• Autorouter PR #2382 pins this commit. The topology-compaction change and its snapshot churn have been removed there. Its SRJ18 sample 3 regression is addressed by keeping routing obstacles separate from the original physical pads used by DRC.
• Same-machine Dataset01 comparison at integration 70284cdc versus main fb6c6d77: 85/85 complete and 85/85 relaxed-DRC clean on both revisions, zero timeouts, and no per-board regressions. Benchmark run. The SRJ18 comparison also has no per-board completion, timeout, or relaxed-DRC regressions: 13/16 complete, 8/16 relaxed-DRC clean, and one timeout on both revisions. Total DRC errors fall from 98 to 64, with no board gaining errors. Median time is +2.5%, P95 +4.7%. SRJ18 benchmark. Final integration CI passes on e27f1c8b: all nine test shards, build, TypeScript, formatting, ID checks, and deployment checks. The benchmark revision 70284cdc has identical production source and dependencies; the final follow-up only records native macOS/Linux bugreport90 snapshots.

Additional pad-geometry illustrations

[tscircuitbot]

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/benchmark [benchmark.sh args...]
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Everything after /benchmark is forwarded directly to ./benchmark.sh.

Examples:

• /benchmark -> run default SRJ18 benchmark settings
• /benchmark 10 -> run first 10 SRJ18 samples
• /benchmark --dataset srj18 -> run all SRJ18 samples
• /benchmark 1 --dataset srj18 -> run the first SRJ18 sample
• /benchmark --dataset drc14 -> run all DRC14 samples
• /benchmark all --concurrency 4 -> run all SRJ18 samples with 4 workers
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• /benchmark --scenario-limit 20 --max-iterations 100 -> run 20 samples with a max iteration override

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