Replay blocked fanout buses by explicit order - #151
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Benchmark diff against main for 11-left-center: 14.07s on this PR vs 14.17s on main — 0.10s faster (0.7%), effectively unchanged. The other 11 Dataset 31 samples reached the 120s timeout on the PR, so they do not provide a measurable timing diff. |
seveibar
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seveibar
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this fanout looks really bad tho-
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@ShiboSoftwareDev we shouldn't be seeing the 90 degree traces etc. it might just be post-processing which is relatively simple |
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/benchmark |
seveibar
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e.g. why do these fanout downward, there's a lot of weirdness
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i think this might be a good contrib, only think stopping merging is our benchmarking not working T-T |
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/benchmark |
Dataset 31 — AM62L fanout benchmarkCommit: Full JSON/Markdown reports and logs Solved 1/12 selected samples. Completed 12/12; partial 0; errors 0; timeouts 11. Concurrency: 32; per-sample deadline: 120s; assignment budget: sample defaults. Only dataset-fanout31-am62l is benchmarked. Solved means validated AM62L fanout with the original constraints, not RAM fanout or inter-chip routing. Dataset revision: Per-sample results
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/benchmark |
Dataset 31 — AM62L fanout benchmarkCommit: Full JSON/Markdown reports and logs Solved 12/12 selected samples. Completed 12/12; partial 0; errors 0; timeouts 0. Concurrency: 32; per-sample deadline: 120s; assignment budget: sample defaults. Only dataset-fanout31-am62l is benchmarked. Solved means validated AM62L fanout with the original constraints, not RAM fanout or inter-chip routing. Dataset revision: Per-sample results
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Records the concrete bus order from an improving attempt, then retries once with the failed bus immediately before its reported blocker. The real OSM-S carrier regression changes from 95/96 to 96/96 routed connections without coupling the repair to a named routing strategy.