Pushing the bf16 multiplication clock frequency to the max on the nominal corner on IHP 130nm 5L node.
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Mar 29, 2026 - Python
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ihp-open-pdk
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Experimental 4x8 configuration for Tiny Tapeout IHP
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Dec 8, 2025 - Verilog
This is the AC3E-IHP_ALDO, an analog voltage regulator separated in different modules for testing.
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Sep 25, 2025 - Python
Gm/Id Design Flow with Open Source PDK and Tools
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Jul 6, 2025 - Python
Submission for Tiny Tapeout IHP26a : High Density Serial-In Serial-Out shift register using DLHQ
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Mar 23, 2026 - Verilog
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