Riscv-rust is a RISC-V processor and peripheral devices emulator project written in Rust and compilable to WebAssembly.
This is a substantially enhanced fork of Takahiro's riscv-rust original emulator. This fork is already far more complete and is working towards near 100% correctness. Ultimately, we also expect it to become substantially faster, but this work is delayed until this is sufficiently correct to run benchmarks and off-the-shelf Linux distributions.
You can run Linux on the emulator in your browser. Online demo is here
- Emulate RISC-V RV64GC processor and peripheral devices (virtio block device and a UART)
- Also runnable in browser with WebAssembly
- Runnable locally
- Debugger
- RV64IMAC
- RV64FD (PARTIALLY flags/rounding modes very lacking)
- RV64Zifencei
- RV64Zicsr
- RV64B (Zicond and Zba done)
- Svnapot
- CSR (mostly done)
- Sv39
- Sv48 (untested, but should work)
- Privileged instructions
- PMP (this is intensionally not implemented as it will negatively affect performance)
The emulator supports all instructions listed above but some
- Boots Debian Trixie
- Linux OpenSBI and legacy BBL boot support
- gdb, rustc, and Geekbench segfaults
- Ubuntu boot crashes and hangs
- Debian boot sees non-fatal crashes
- U-boot loads but hangs before hand-off
Add the following line into Cargo.toml of your Rust project.
[dependencies]
riscv_rust = { git = "https://github.com/tommythorn/rust-rust" }
Refer to Document for the API.
$ git clone https://github.com/tommythorn/riscv-rust.git
$ cd riscv-rust
$ cargo build --release$ cd riscv-rust/cli
# Run Linux
$ cargo run --release ../resources/linux/opensbi/fw_payload.elf -f ../resources/linux/rootfs.imgPrerequirements
- Install riscv-gnu-toolchain
- Install riscv-tests
$ cd riscv-rust/cli
$ cargo run $path_to_riscv_tets/isa/rv64ui-p-add -nSee wasm/web
See wasm/npm
Running 64-bit RISC-V Linux on QEMU
xv6-riscv is the RISC-V port of xv6 which is UNIX V6 rewritten by MIT for x86 in the current C language.