GitHub - thata/mhrd: My MHRD solutions port to Verilog

Name	Name	Last commit message	Last commit date
Latest commit thata CPUが完成した気がする Nov 16, 2019 6970acd · Nov 16, 2019 History 23 Commits
adder	adder	Add ADDER4B	Oct 24, 2019
alu	alu	論理演算のテストを追加	Nov 7, 2019
and	and	Add NAND, NOT and AND.	Oct 20, 2019
cpu	cpu	CPUが完成した気がする	Nov 16, 2019
decoder	decoder	Add DECODER	Nov 13, 2019
demux	demux	Add DEMUX4W	Oct 30, 2019
memory	memory	Add RAM4W16B	Nov 13, 2019
mux	mux	コメント追記	Oct 29, 2019
nand	nand	Add NAND, NOT and AND.	Oct 20, 2019
not	not	Add NAND, NOT and AND.	Oct 20, 2019
or	or	Add OR.	Oct 21, 2019
xor	xor	Add XOR	Oct 23, 2019
.gitignore	.gitignore	Add NAND, NOT and AND.	Oct 20, 2019