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Implement support for 32-bit memory access scheme #39

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Merged
merged 2 commits into from
Jul 26, 2025

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FeldrinH
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Closes #37 and unblocks USB support for C0 and possibly some other STM32 families. Tested on STM32C071 devboard.

Note: I changed the UsbPeripheral trait a little, which unfortunately makes this a breaking change. In practice this should not be a big issue, since existing HAL-s can keep using the previous version pretty much indefinitely and the migration is very simple.

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FeldrinH commented Jul 20, 2025

@usbalbin If you could test this on STM32H5 and confirm if this makes things work on H5 as well then that would be great.

(Full disclosure: I have not looked at the STM32H5 refrence manual and have no idea if H5 USB implementation is in any way compatible with this driver. I just know from your issue that it uses a 32-bit memory access scheme.)

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I will try!

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Works great from what I can tell. Tested with this on a nucleo-h533

} else {
self.mem[index * 2].set(value);
}
fn get_mem_slice<T>(&self) -> &mut [VolatileCell<T>] {
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@Disasm Disasm Jul 25, 2025

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I believe this function is very unsafe because calling it twice within the same block is unsound.

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That's fair. I realized that I can return &[VolatileCell<T>], which relaxes the safety requirements quite a bit. I did also mark it as unsafe for posterity.

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Disasm commented Jul 25, 2025

Looks good to me overall. I'm happy to approve the PR after changes to get_mem_slice signature.

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Disasm commented Jul 26, 2025

Thank you!

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Disasm commented Jul 26, 2025

Ok, CI is broken (fixed in #40), so merging the PR after running corresponding checks locally.

@Disasm Disasm merged commit c5260f9 into stm32-rs:master Jul 26, 2025
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32bit endpoint memory access scheme
3 participants