This repository contains fundamental modules of a digital circuit written in Verilog.
Table of Contents
- Clock (customisable tick rate)
- Clock Divider (customisable factor)
- D Latch
- Memory
- 32 Bit LFSR - Pseudo Random Number Generator
- Switch Debouncer
- Pattern Detector
- Two's Complementer
- N Bit Shift Register (universal shift register)
- Typical Example of circuit with datapath and control unit
- N-Bit Barrel Shifter
- FIFO