Skip to content

saetekm/DreamcastHDMI

 
 

Repository files navigation

DreamcastHDMI / DCHDMI


News

2018-05-09

Mainboard 1.2d Link

Close to final FPGA mainboard by citrus3000psi.

Some features are currently unused (e.g. pads for maple bus integration).
They will allow some cool firmware extensions in the future (e.g. OSD)

Flat flex 1.2a

citrus3000psi designed a flat flex cable, which connects the Mainboard to the audio and video dacs.

Cylcone 10 LP (10CL025):

We switched to a bigger FPGA to support more video output modes, 10CL016 and EP4CE6 are also supported.

Output Resolution Notes 10CL025 10CL016 EP4CE6
VGA 640x480 Correct pixel/aspect ratio!
480p 720x480 Original output: usually only 640px of the available 720px are used.
Incorrect pixel/aspect ratio!
960p 1280x960 x2 VGA
1080p 1280x960 x2 VGA, framed in 1920x1080
Other firmware features
  • basic 480i line doubling

  • 240p support

  • Scanlines.
    Available by rebuilding the firmware and defining SCANLINES_EVEN/SCANLINES_ODD, SCANLINES_THICK/SCANLINES_THIN and SCANLINES_INTENSITY in Macros.qsf

  • Upcoming: OSD. Maple bus connection is already on the 1.2d mainboard. Will be used in a later firmware.

2018-03-05

Restructured source code and updated pin assignments for citrus3000psi's DCHDMI board 1.1:

Moved older versions (without ADV7315 and/or ICS664-3) to v0.1

Restructured "firmware" site:

Details on the available versions can be found here.

2017-12-21

Added ESP-12 based firmware management tool, for upgrading firmware via WiFi.

  • A demo of the FirmwareManager could be found here: Demo

2017-06-11

Many thanks to citrus3000psi for his work on a QSB (quick soldering board). Check out the thread on the shmups forum: DreamcastHDMI github by chriz2600

2017-05-29

New (auto)-build system using docker. Build system using docker

2017-04-23

Added schematics and some information on Cyclone IV + ADV7513 + ICS664-3 build: CycloneIV-ADV7513-ICS664

2017-04-18

A new version of the Cyclone IV + ADV7513 version is available here.

Features in this version:

  • Recoding of 480p (720x480) to VGA (640x480).

    HDTVs will display correct 1:1 instead of 8:9 pixel ratio for 4:3 aspect ratio. To achieve the required clock multiplication/division an ICS664-03 digitial video clock source is used. 320 pixel are buffered in RAM, so the delay from this will be 11.9us (microseconds, I will call this zero delay :) )

    This diagram shows the setup:

Block diagram

  • Support for 480i and 240p by line doubling with recoding to 480p as above.

  • Support for 480p/480i switching detection

Not in this version:

  • PAL 576i support

2017-03-27

Cheaper FPGA

Instead of a DE0 Nano SOC you can also use a Waveshare CoreEP4CE6 Development Board. You can get it for 20-25$ via Aliexpress. The project folder for this is FPGA-CycloneIV. Because the board does not expose any clock pins, you have to desolder the oscillator and attach the dreamcast clock directly to the board.

Oscillator

ADV7513

I also created a board for experimenting with the Analog Devices ADV7513 HDMI Transmitter which can be found here. The verilog code for this can be found here.

Direct HDMI output from FPGA

If you want to go the "cheap" DIY route, i've made a PCB for the LVDS2TMDS part.

Dreamcast video output

Some details about the Dreamcast scaling issue on modern HDTVs: Video details link

Roadmap
  1. Create cheaper solution based on simple FPGA development board.
  2. Use FPGA to enable 480p mode. Currently I have to plug in a VGA cable ;)
  3. Design FPGA board with Cyclone IV FPGA and ADV7513 transmitter. I'm planning to include some RAM to be able to implement 480i as well as basic upscaling later. Edit: I don't need external RAM for line doubling.
  4. Design flat flex circuit to connect Dreamcast video DAC and audio DAC to FPGA board.
  5. Detailed HOWTOs.

About

Dreamcast HDMI

Resources

License

Stars

Watchers

Forks

Packages

No packages published

Languages

  • Verilog 66.3%
  • HTML 19.8%
  • VHDL 6.5%
  • Assembly 3.4%
  • Shell 2.7%
  • Perl 0.8%
  • Mathematica 0.5%