This repository is designed to be an OOT module to use in conjunction with hdl-rwt. It adds support for the Carbon SDR, as well as the Carbon SDR with a CARP (Carbon Accessory Rf Platform) backpack.
For issues with this repository, its documentation, or additional questions, please reach out to our lead FPGA engineer, Jonathan Ambrose, at ([email protected]).
For the purposes of this repository, the hardware revisions for the Carbon SDR with a CARP are defined as rev[Carbon hardware revision].[CARP hardware revision]
Along with the requirements listed in the hdl-rwt README, this repository additionally requires the OOT module hdl-te080x-board-files.
Additionally, if you would like to target the 9EG or 15EG SOMs that we offer for the Carbon, it will require the purchase of a Vivado license to target these larger FPGAs.
To use this repository in conjunction with hdl-rwt, this repository must be checked out into the oot directory as shown below:
$ ls oot
hdl-carbon/ hdl-te080x-board-files/
After having done this, you must run scripts/link_oot.sh from the hdl-rwt repository. This will create hard symlinks from the files in your OOT modules to the directory structure within hdl-rwt.
After linking your files, running scripts/build_projects.py from hdl-rwt will add the additional options to build for the Carbon and Carbon-CARP carrier boards, as can be seen below:
$ ./scripts/build_projects.py
Select Carrier(s)
0: oxygen
1: carbon-carp
2: carbon
3: All
Selection(s):
The utilization directory stores information regarding the most recent set of builds using the projects in this repository.
There are a set of Markdown files (starting with utilization.md) that organizes the information in an easy-to-navigate format.
Additionally, full utilization reports can be viewed in the directory utilization/utilization.
For clarification's sake on the nomenclature, a "personality" is a generic block diagram configuration that can/will be customized on a per board basis. A "project" is the single customized Vivado project for a combination of personality and board.
For details about this personality, please refer to the README for the hdl-rwt repository.
The current utilization numbers for this personality can be found here.
| Pin Number | Name | In/Out |
|---|---|---|
| 0-8 | GPIO Header | IO |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |
| Pin Number | Name | In/Out |
|---|---|---|
| 0 | Line Matrix Clock | In |
| 1 | Line Matrix Reset | In |
| 2-5 | Line Matrix Input Select | In |
| 6-9 | Line Matrix Output Select | Out |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |
For details about this personality, please refer to the README for the hdl-rwt repository.
The current utilization numbers for this personality can be found here.
| Pin Number | Name | In/Out |
|---|---|---|
| 0-8 | GPIO Header | IO |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |
| Pin Number | Name | In/Out |
|---|---|---|
| 0 | Line Matrix Clock | In |
| 1 | Line Matrix Reset | In |
| 2-5 | Line Matrix Input Select | In |
| 6-9 | Line Matrix Output Select | Out |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |
For details about this personality, please refer to the README for the hdl-rwt repository.
The current utilization numbers for this personality can be found here.
| Pin Number | Name | In/Out |
|---|---|---|
| 0-8 | GPIO Header | IO |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |
| Pin Number | Name | In/Out |
|---|---|---|
| 0 | Line Matrix Clock | In |
| 1 | Line Matrix Reset | In |
| 2-5 | Line Matrix Input Select | In |
| 6-9 | Line Matrix Output Select | Out |
| 9-21 | Reserved | |
| 22-29 | AD9361 CTRL_OUT (gpio_status_0) | In |
| 30-37 | AD9361 (2) CTRL_OUT (gpio_status_1) | In |
| 38-41 | AD9361 CTRL_IN (gpio_ctl_0) | Out |
| 42-45 | AD9361 (2) CTRL_IN (gpio_ctl_1) | Out |
| 46-50 | Reserved | |
| 51 | AD9361 Sync | Out |
| 52 | AD9361 Resetb | Out |
| 53 | AD9361 EN AGC | Out |
| 54 | UP Enable | Out |
| 55 | UP TXnRX | Out |
| 56 | AD9361 (2) EN AGC | Out |
| 57 | UP Enable (2) | Out |
| 58 | UP TXnRX (2) | Out |
| 59-64 | Reserved | |
| 65 | AD9361 (2) Resetb | Out |
| 66-94 | Reserved |