Allow consecutive loops

[caleridas]

Allow hls loops to be consecutive without memory merge operation in-between

[caleridas]

This fixes at least one test for me locally for the hls test suite.

HOWEVER hls test suite still remains broken at master with a number of failures
(segfaults). In this state, I am unable to diagnose any other hls failures that
I may or may not introduce with changes as it is fully broken at master already.

[caleridas]

The next crash is in mem-conv.cpp, here:

if (branchOperation)
{
  // end of loop
  JLM_ASSERT(branchOperation->loop);
  state_edge = get_mem_state_user(
      util::assertedCast<rvsdg::RegionResult>(get_mem_state_user(sn->output(0)))->output());
}

the problem is that the assertion that a "region result" must necessarily follow a branch operation seems to be false -- in the crashing case, the branch op is not followed by a region result

I lack a comprehensive description of expected shape invariants, who is supposed to establish them, or what precisely the behavior of the code here should be. Obviously there are some strong assumptions of redundant structures (branch must be last op in region, and it must only exist there -- why is that the case, and if that is the case why are they needed to begin with? aren't they redundant?)

@sjalander