openhcl_boot: Account for control bits in CR3

[romank-msft]

The CR3 register isn't just a page root base address: its 12 LSBs may contain
control bits. See
* AMD PPR Vol 2 "Syetem Programming", "3.1.2 CR2 and CR3 Registers"
* Intel SDM Vol 3 "System Programming", "4.5.2 Use of CR3 ..."
for details.

Clear out the 12 LSBs to be follow the letter of the processor manuals.

[jstarks]

This is fine, but we control how cr3 gets set in the loader, so the only way there'd be some low bits is if we put them there, right?

[jstarks]

(As a side note, it therefore seems weird to even have to read cr3 to get the page table base, since we should already know where it is.)

[romank-msft]

This is fine, but we control how cr3 gets set in the loader, so the only way there'd be some low bits is if we put them there, right?

Right! It felt very decoupled, and should things change on one side when setting cr3, here the code would blow up. Your other comment captures perfectly where the room for improving is! Instead of using cr3 as the "storage medium" for the page root, could add a field to the ShimParams struct.

[romank-msft]

(As a side note, it therefore seems weird to even have to read cr3 to get the page table base, since we should already know where it is.)

YEP