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Xip mcuboot #2323

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09fc970
boot: zephyr: defines FLASH device for external NOR
FRASTM Sep 1, 2023
2cf744b
boot: zephyr: boards config of the stm32 disco kit
FRASTM Oct 19, 2023
bbe0c73
boot: zephyr: boards config of the stm32h7rs target boards
FRASTM Feb 29, 2024
b2d16e6
boot: zephyr: boards config of the stm32h573 disco kit
FRASTM Apr 8, 2025
e3b8bd4
boot: zephyr: defines FLASH base address device for external NOR
FRASTM Apr 29, 2025
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4 changes: 4 additions & 0 deletions boot/zephyr/boards/b_u585i_iot02a.conf
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Original file line number Diff line number Diff line change
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CONFIG_BOOT_DIRECT_XIP=y
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=1024
40 changes: 40 additions & 0 deletions boot/zephyr/boards/b_u585i_iot02a.overlay
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/*
* Copyright (c) 2025 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/

/*
* Define the device, controller and partition to be the external memory
* for running the application in external NOR from MCUboot
*/

/delete-node/ &slot0_partition;
/delete-node/ &slot1_partition;
/delete-node/ &scratch_partition;
/delete-node/ &storage_partition;

&mx25lm51245 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

slot0_partition: partition@0 {
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as I said in the other PR, adding this here is pointless, this should go in your base board file in zephyr otherwise you will have completely different partitions for mcuboot vs every application, and the applications will not boot because of that

label = "image-0";
reg = <0x00000000 DT_SIZE_K(416)>;
};
slot1_partition: partition@68000 {
label = "image-1";
reg = <0x00068000 DT_SIZE_K(416)>;
};
scratch_partition: partition@d0000 {
label = "image-scratch";
reg = <0x000d00000 DT_SIZE_K(64)>;
};
Comment on lines +31 to +34
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and unless you have different sector sizes or variable sector sizes, scratch should not be present

storage_partition: partition@e0000 {
label = "storage";
reg = <0x000e0000 DT_SIZE_K(64)>;
}; };
};

4 changes: 4 additions & 0 deletions boot/zephyr/boards/nucleo_h7s3l8.conf
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CONFIG_BOOT_DIRECT_XIP=y
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=4096
4 changes: 4 additions & 0 deletions boot/zephyr/boards/stm32h573i_dk.conf
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CONFIG_BOOT_DIRECT_XIP=y
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=4096
4 changes: 4 additions & 0 deletions boot/zephyr/boards/stm32h750b_dk.conf
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CONFIG_BOOT_DIRECT_XIP=y
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=256
4 changes: 4 additions & 0 deletions boot/zephyr/boards/stm32h7s78_dk.conf
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CONFIG_BOOT_DIRECT_XIP=y
CONFIG_STM32_MEMMAP=y
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
CONFIG_BOOT_MAX_IMG_SECTORS=4096
18 changes: 17 additions & 1 deletion boot/zephyr/flash_map_extended.c
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Expand Up @@ -20,7 +20,23 @@

BOOT_LOG_MODULE_DECLARE(mcuboot);

#if (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
#if defined(CONFIG_STM32_MEMMAP)
/* MEMORY MAPPED for XiP on external NOR flash takes the sspi-nor or ospi-nor or qspi-nor device */
#define FLASH_DEVICE_ID SPI_FLASH_0_ID
#if DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_xspi_nor), okay)
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_xspi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_xspi),1)
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Instance 0 of st_stm32_xspi could be used for other purposes (PSRAM on N6-DK for instance).
We should ensure we get the parent of the st_stm32_xspi_nor node instead.
Something like:

Suggested change
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_xspi),1)
#define DT_DRV_COMPAT st_stm32_xspi_nor
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST_PARENT(0), 1)

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I just ran into this exact issue on my STM32H7S78-DK, see zephyrproject-rtos/zephyr#88052 (comment)

This is because the flash for XiP is on XSPI2, and there is a PSRAM on XSPI1 which is therefore enabled in the device tree. Consequently, the macro being reviewed here is mistakenly using the XSPI1 (PSRAM) address space instead of XSPI2.

I solved the issue with the following change:

Suggested change
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_xspi),1)
#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_PARENT(FLASH_DEVICE_NODE),1)

I think we could do the same for ospi/qspi as well

#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_ospi_nor), okay)
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_ospi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_ospi_nor))
#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_qspi_nor), okay)
#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_qspi_nor)
#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_qspi_nor))
#else
#error "FLASH_DEVICE_NODE could not be determined"
#endif

#elif (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
#define FLASH_DEVICE_ID SOC_FLASH_0_ID
#define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS
#define FLASH_DEVICE_NODE DT_CHOSEN(zephyr_flash_controller)
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