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[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 kmov intrinsics to be used in constexp #169895

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Merged
merged 5 commits into from
Dec 1, 2025
Merged

[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 kmov intrinsics to be used in constexp #169895

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8af38c0
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - …
0xzre Nov 28, 2025
dcdf950
fix format clang
0xzre Nov 30, 2025
3581ab9
move TEST_CONSTEXPR check below matching intrinsic
0xzre Dec 1, 2025
22b229b
move TEST_CONSTEXPR check below matching intrinsic
0xzre Dec 1, 2025
cae2d74
Merge branch 'main' into issue-166975
RKSimon Dec 1, 2025
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6 changes: 3 additions & 3 deletions clang/include/clang/Basic/BuiltinsX86.td
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Expand Up @@ -3160,15 +3160,15 @@ let Features = "avx512bw", Attributes = [NoThrow, Const] in {
def kshiftridi : X86Builtin<"unsigned long long int(unsigned long long int, _Constant unsigned int)">;
}

let Features = "avx512dq", Attributes = [NoThrow, Const] in {
let Features = "avx512dq", Attributes = [NoThrow, Const, Constexpr] in {
def kmovb : X86Builtin<"unsigned char(unsigned char)">;
}

let Features = "avx512f", Attributes = [NoThrow, Const] in {
let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr] in {
def kmovw : X86Builtin<"unsigned short(unsigned short)">;
}

let Features = "avx512bw", Attributes = [NoThrow, Const] in {
let Features = "avx512bw", Attributes = [NoThrow, Const, Constexpr] in {
def kmovd : X86Builtin<"unsigned int(unsigned int)">;
def kmovq : X86Builtin<"unsigned long long int(unsigned long long int)">;
}
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7 changes: 7 additions & 0 deletions clang/lib/AST/ByteCode/InterpBuiltin.cpp
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Expand Up @@ -5019,6 +5019,13 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
S, OpPC, Call,
[](const APSInt &LHS, const APSInt &RHS) { return LHS + RHS; });

case X86::BI__builtin_ia32_kmovb:
case X86::BI__builtin_ia32_kmovw:
case X86::BI__builtin_ia32_kmovd:
case X86::BI__builtin_ia32_kmovq:
return interp__builtin_elementwise_int_unaryop(
S, OpPC, Call, [](const APSInt &Src) { return Src; });

case X86::BI__builtin_ia32_kunpckhi:
case X86::BI__builtin_ia32_kunpckdi:
case X86::BI__builtin_ia32_kunpcksi:
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10 changes: 10 additions & 0 deletions clang/lib/AST/ExprConstant.cpp
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Expand Up @@ -16900,6 +16900,16 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E,
[](const APSInt &LHS, const APSInt &RHS) { return LHS + RHS; });
}

case X86::BI__builtin_ia32_kmovb:
case X86::BI__builtin_ia32_kmovw:
case X86::BI__builtin_ia32_kmovd:
case X86::BI__builtin_ia32_kmovq: {
APSInt Val;
if (!EvaluateInteger(E->getArg(0), Val, Info))
return false;
return Success(Val, E);
}

case clang::X86::BI__builtin_ia32_vec_ext_v4hi:
case clang::X86::BI__builtin_ia32_vec_ext_v16qi:
case clang::X86::BI__builtin_ia32_vec_ext_v8hi:
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10 changes: 5 additions & 5 deletions clang/lib/Headers/avx512bwintrin.h
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Expand Up @@ -178,22 +178,22 @@ _kadd_mask64(__mmask64 __A, __mmask64 __B) {
#define _kshiftri_mask64(A, I) \
((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I)))

static __inline__ unsigned int __DEFAULT_FN_ATTRS
_cvtmask32_u32(__mmask32 __A) {
static __inline__ unsigned int
__DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask32_u32(__mmask32 __A) {
return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A);
}

static __inline__ unsigned long long __DEFAULT_FN_ATTRS
static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR
_cvtmask64_u64(__mmask64 __A) {
return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A);
}

static __inline__ __mmask32 __DEFAULT_FN_ATTRS
static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
_cvtu32_mask32(unsigned int __A) {
return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A);
}

static __inline__ __mmask64 __DEFAULT_FN_ATTRS
static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
_cvtu64_mask64(unsigned long long __A) {
return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A);
}
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6 changes: 3 additions & 3 deletions clang/lib/Headers/avx512dqintrin.h
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Expand Up @@ -123,12 +123,12 @@ _kadd_mask16(__mmask16 __A, __mmask16 __B) {
#define _kshiftri_mask8(A, I) \
((__mmask8)__builtin_ia32_kshiftriqi((__mmask8)(A), (unsigned int)(I)))

static __inline__ unsigned int __DEFAULT_FN_ATTRS
_cvtmask8_u32(__mmask8 __A) {
static __inline__ unsigned int
__DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask8_u32(__mmask8 __A) {
return (unsigned int)__builtin_ia32_kmovb((__mmask8)__A);
}

static __inline__ __mmask8 __DEFAULT_FN_ATTRS
static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
_cvtu32_mask8(unsigned int __A) {
return (__mmask8)__builtin_ia32_kmovb((__mmask8)__A);
}
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6 changes: 3 additions & 3 deletions clang/lib/Headers/avx512fintrin.h
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Expand Up @@ -8069,12 +8069,12 @@ _mm512_kxor(__mmask16 __A, __mmask16 __B) {
#define _kshiftri_mask16(A, I) \
((__mmask16)__builtin_ia32_kshiftrihi((__mmask16)(A), (unsigned int)(I)))

static __inline__ unsigned int __DEFAULT_FN_ATTRS
_cvtmask16_u32(__mmask16 __A) {
static __inline__ unsigned int
__DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask16_u32(__mmask16 __A) {
return (unsigned int)__builtin_ia32_kmovw((__mmask16)__A);
}

static __inline__ __mmask16 __DEFAULT_FN_ATTRS
static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
_cvtu32_mask16(unsigned int __A) {
return (__mmask16)__builtin_ia32_kmovw((__mmask16)__A);
}
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8 changes: 8 additions & 0 deletions clang/test/CodeGen/X86/avx512bw-builtins.c
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Expand Up @@ -576,6 +576,14 @@ __mmask64 test_cvtu64_mask64(__m512i A, __m512i B, unsigned long long C) {
return _mm512_mask_cmpneq_epu8_mask(_cvtu64_mask64(C), A, B);
}

TEST_CONSTEXPR(_cvtmask32_u32((__mmask32)0xDEADBEEF) == 0xDEADBEEF);
TEST_CONSTEXPR(_cvtu32_mask32(0x13579BDF) == (__mmask32)0x13579BDF);
TEST_CONSTEXPR(_cvtu32_mask32(_cvtmask32_u32((__mmask32)0x2468ACE0)) == (__mmask32)0x2468ACE0);
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@RKSimon RKSimon Nov 30, 2025

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(style) place each TEST_CONSTEXPR below the correspond intrinsic test - we don't want them to become disconnected


TEST_CONSTEXPR(_cvtmask64_u64((__mmask64)0x123456789ABCDEF0ULL) == 0x123456789ABCDEF0ULL);
TEST_CONSTEXPR(_cvtu64_mask64(0x0F0F0F0F0F0F0F0FULL) == (__mmask64)0x0F0F0F0F0F0F0F0FULL);
TEST_CONSTEXPR(_cvtu64_mask64(_cvtmask64_u64((__mmask64)0xF0F0F0F0F0F0F0F0ULL)) == (__mmask64)0xF0F0F0F0F0F0F0F0ULL);

__mmask32 test_load_mask32(__mmask32 *A, __m512i B, __m512i C) {
// CHECK-LABEL: test_load_mask32
// CHECK: [[LOAD:%.*]] = load i32, ptr %{{.*}}
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4 changes: 4 additions & 0 deletions clang/test/CodeGen/X86/avx512dq-builtins.c
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Expand Up @@ -384,6 +384,10 @@ __mmask8 test_cvtu32_mask8(__m512i A, __m512i B, unsigned int C) {
return _mm512_mask_cmpneq_epu64_mask(_cvtu32_mask8(C), A, B);
}

TEST_CONSTEXPR(_cvtmask8_u32((__mmask8)0x5A) == 0x5A);
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@RKSimon RKSimon Dec 1, 2025

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move this below test_cvtmask8_u32

TEST_CONSTEXPR(_cvtu32_mask8(0xB7) == (__mmask8)0xB7);
TEST_CONSTEXPR(_cvtu32_mask8(_cvtmask8_u32((__mmask8)0xDE)) == (__mmask8)0xDE);

__mmask8 test_load_mask8(__mmask8 *A, __m512i B, __m512i C) {
// CHECK-LABEL: test_load_mask8
// CHECK: [[LOAD:%.*]] = load i8, ptr %{{.*}}
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4 changes: 4 additions & 0 deletions clang/test/CodeGen/X86/avx512f-builtins.c
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Expand Up @@ -9596,6 +9596,10 @@ __mmask16 test_cvtu32_mask16(__m512i A, __m512i B, unsigned int C) {
return _mm512_mask_cmpneq_epu32_mask(_cvtu32_mask16(C), A, B);
}

TEST_CONSTEXPR(_cvtmask16_u32((__mmask16)0xBEEF) == 0xBEEF);
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@RKSimon RKSimon Dec 1, 2025

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move this below test_cvtmask16_u32

TEST_CONSTEXPR(_cvtu32_mask16(0xCAFE) == (__mmask16)0xCAFE);
TEST_CONSTEXPR(_cvtu32_mask16(_cvtmask16_u32((__mmask16)0x1357)) == (__mmask16)0x1357);

__mmask16 test_load_mask16(__mmask16 *A, __m512i B, __m512i C) {
// CHECK-LABEL: test_load_mask16
// CHECK: [[LOAD:%.*]] = load i16, ptr %{{.*}}{{$}}
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