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[CIR][X86] Implement lowering for sqrt builtins #169310
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| Original file line number | Diff line number | Diff line change |
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@@ -1347,13 +1347,15 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, | |
| case X86::BI__builtin_ia32_sqrtsh_round_mask: | ||
| case X86::BI__builtin_ia32_sqrtsd_round_mask: | ||
| case X86::BI__builtin_ia32_sqrtss_round_mask: | ||
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Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. You need to insert a call to
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. May I just move the
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. No. We are attempting to keep builtins in the same relative order as they appear in classic codegen and the incubator in order to make the code easier to navigate.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Understood! |
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| errorNYI("Unimplemented builtin"); | ||
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| return {}; | ||
| case X86::BI__builtin_ia32_sqrtph512: | ||
| case X86::BI__builtin_ia32_sqrtps512: | ||
| case X86::BI__builtin_ia32_sqrtpd512: | ||
| cgm.errorNYI(expr->getSourceRange(), | ||
| std::string("unimplemented X86 builtin call: ") + | ||
| getContext().BuiltinInfo.getName(builtinID)); | ||
| return {}; | ||
| case X86::BI__builtin_ia32_sqrtpd512: { | ||
| mlir::Location loc = getLoc(expr->getExprLoc()); | ||
| mlir::Value arg = ops[0]; | ||
| return cir::SqrtOp::create(builder, loc, arg.getType(), arg).getResult(); | ||
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| } | ||
| case X86::BI__builtin_ia32_pmuludq128: | ||
| case X86::BI__builtin_ia32_pmuludq256: | ||
| case X86::BI__builtin_ia32_pmuludq512: { | ||
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| @@ -1,4 +1,4 @@ | ||
| //====- LowerToLLVM.cpp - Lowering from CIR to LLVMIR ---------------------===// | ||
| //====- LowerToLLVM.cpp - Lowering from CIR to LLVMIR ---------------------===// | ||
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| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
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@@ -186,6 +186,14 @@ mlir::LogicalResult CIRToLLVMCopyOpLowering::matchAndRewrite( | |
| return mlir::success(); | ||
| } | ||
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| mlir::LogicalResult SqrtOpLowering::matchAndRewrite( | ||
| cir::SqrtOp op, OpAdaptor adaptor, | ||
| mlir::ConversionPatternRewriter &rewriter) const { | ||
| mlir::Type resTy = typeConverter->convertType(op.getType()); | ||
| rewriter.replaceOpWithNewOp<mlir::LLVM::SqrtOp>(op, resTy, adaptor.getSrc()); | ||
| return mlir::success(); | ||
| } | ||
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| mlir::LogicalResult CIRToLLVMCosOpLowering::matchAndRewrite( | ||
| cir::CosOp op, OpAdaptor adaptor, | ||
| mlir::ConversionPatternRewriter &rewriter) const { | ||
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| @@ -0,0 +1,45 @@ | ||
| #include <immintrin.h> | ||
| // Test X86-specific sqrt builtins | ||
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| // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir | ||
| // RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s | ||
| // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll | ||
| // RUN: FileCheck --check-prefix=LLVM --input-file=%t-cir.ll %s | ||
| // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll | ||
| // RUN: FileCheck --check-prefix=OGCG --input-file=%t.ll %s | ||
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| // Test __builtin_ia32_sqrtph512 | ||
| __m512h test_sqrtph512(__m512h a) { | ||
| return __builtin_ia32_sqrtph512(a); | ||
| } | ||
| // CIR: cir.func @test_sqrtph512 | ||
| // CIR: [[RES:%.*]] = cir.sqrt {{%.*}} : !cir.vector<!cir.fp16 x 32> | ||
| // CIR: cir.return [[RES]] | ||
| // LLVM: define {{.*}} @test_sqrtph512 | ||
| // LLVM: call <32 x half> @llvm.sqrt.v32f16 | ||
| // OGCG: define {{.*}} @test_sqrtph512 | ||
| // OGCG: call <32 x half> @llvm.sqrt.v32f16 | ||
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| // Test __builtin_ia32_sqrtps512 | ||
| __m512 test_sqrtps512(__m512 a) { | ||
| return __builtin_ia32_sqrtps512(a); | ||
| } | ||
| // CIR: cir.func @test_sqrtps512 | ||
| // CIR: [[RES:%.*]] = cir.sqrt {{%.*}} : !cir.vector<!cir.float x 16> | ||
| // CIR: cir.return [[RES]] | ||
| // LLVM: define {{.*}} @test_sqrtps512 | ||
| // LLVM: call <16 x float> @llvm.sqrt.v16f32 | ||
| // OGCG: define {{.*}} @test_sqrtps512 | ||
| // OGCG: call <16 x float> @llvm.sqrt.v16f32 | ||
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| // Test __builtin_ia32_sqrtpd512 | ||
| __m512d test_sqrtpd512(__m512d a) { | ||
| return __builtin_ia32_sqrtpd512(a); | ||
| } | ||
| // CIR: cir.func @test_sqrtpd512 | ||
| // CIR: [[RES:%.*]] = cir.sqrt {{%.*}} : !cir.vector<!cir.double x 8> | ||
| // CIR: cir.return [[RES]] | ||
| // LLVM: define {{.*}} @test_sqrtpd512 | ||
| // LLVM: call <8 x double> @llvm.sqrt.v8f64 | ||
| // OGCG: define {{.*}} @test_sqrtpd512 | ||
| // OGCG: call <8 x double> @llvm.sqrt.v8f64 |
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Can you add a description with an example of the CIR format?
We're trying to standardize the descriptions of all our operations to include an example.
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I had done that initially but removed the example after seeing other floating point ops didn't have examples too. Added it again now.