Merge pull request #16 from OFFTKP/xth

assembler: Add XTheadCondMov support
lioncash · Nov 8, 2024 · c86bf13 · c86bf13
2 parents ce1e82f + 2b1929e
commit c86bf13
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Showing 5 changed files with 94 additions and 44 deletions.
diff --git a/README.md b/README.md
@@ -14,50 +14,51 @@ to how [Xbyak](https://github.com/herumi/xbyak) allows for runtime code generati
 
 Includes both 32-bit and 64-bit instructions in the following:
 
-| Feature   | Version |
-|:----------|:-------:|
-| A         | 2.1     |
-| B         | 1.0     |
-| C         | 2.0     |
-| D         | 2.2     |
-| F         | 2.2     |
-| H         | 1.0     |
-| K         | 1.0.1   |
-| M         | 2.0     |
-| N         | 1.1     |
-| Q         | 2.2     |
-| RV32I     | 2.1     |
-| RV64I     | 2.1     |
-| S         | 1.12    |
-| V         | 1.0     |
-| Ssctr     | 1.0 rc6 |
-| Sstc      | 0.5.4   |
-| Zabha     | 1.0     |
-| Zacas     | 1.0     |
-| Zawrs     | 1.01    |
-| Zcb       | 1.0.4   |
-| Zclsd     | 0.10    |
-| Zcmp      | 1.0.4   |
-| Zcmt      | 1.0.4   |
-| Zfa       | 1.0     |
-| Zfbfmin   | 1.0     |
-| Zfh       | 1.0     |
-| Zfhmin    | 1.0     |
-| Zicbom    | 1.0     |
-| Zicbop    | 1.0     |
-| Zicboz    | 1.0     |
-| Zicfilp   | 1.0     |
-| Zicfiss   | 1.0     |
-| Zicond    | 1.0.1   |
-| Zicsr     | 2.0     |
-| Zifencei  | 2.0     |
-| Zihintntl | 1.0     |
-| Zilsd     | 0.10    |
-| Zvbb      | 1.0     |
-| Zvbc      | 1.0     |
-| Zvfbfmin  | 1.0     |
-| Zvfbfwma  | 1.0     |
-| Zvkn      | 1.0     |
+| Feature       | Version |
+|:--------------|:-------:|
+| A             | 2.1     |
+| B             | 1.0     |
+| C             | 2.0     |
+| D             | 2.2     |
+| F             | 2.2     |
+| H             | 1.0     |
+| K             | 1.0.1   |
+| M             | 2.0     |
+| N             | 1.1     |
+| Q             | 2.2     |
+| RV32I         | 2.1     |
+| RV64I         | 2.1     |
+| S             | 1.12    |
+| V             | 1.0     |
+| Ssctr         | 1.0 rc6 |
+| Sstc          | 0.5.4   |
+| XTheadCondMov | 1.0     |
+| Zabha         | 1.0     |
+| Zacas         | 1.0     |
+| Zawrs         | 1.01    |
+| Zcb           | 1.0.4   |
+| Zclsd         | 0.10    |
+| Zcmp          | 1.0.4   |
+| Zcmt          | 1.0.4   |
+| Zfa           | 1.0     |
+| Zfbfmin       | 1.0     |
+| Zfh           | 1.0     |
+| Zfhmin        | 1.0     |
+| Zicbom        | 1.0     |
+| Zicbop        | 1.0     |
+| Zicboz        | 1.0     |
+| Zicfilp       | 1.0     |
+| Zicfiss       | 1.0     |
+| Zicond        | 1.0.1   |
+| Zicsr         | 2.0     |
+| Zifencei      | 2.0     |
+| Zihintntl     | 1.0     |
+| Zilsd         | 0.10    |
+| Zvbb          | 1.0     |
+| Zvbc          | 1.0     |
+| Zvfbfmin      | 1.0     |
+| Zvfbfwma      | 1.0     |
+| Zvkn          | 1.0     |
 
 Note that usually only extensions considered ratified will be implemented
 as non-ratified documents are considerably more likely to have

diff --git a/include/biscuit/assembler.hpp b/include/biscuit/assembler.hpp
@@ -326,6 +326,11 @@ class Assembler {
     void CZERO_EQZ(GPR rd, GPR value, GPR condition) noexcept;
     void CZERO_NEZ(GPR rd, GPR value, GPR condition) noexcept;
 
+
+    // XTheadCondMov Extension Instructions
+    void TH_MVEQZ(GPR rd, GPR value, GPR condition) noexcept;
+    void TH_MVNEZ(GPR rd, GPR value, GPR condition) noexcept;
+
     // Zicsr Extension Instructions
 
     void CSRRC(GPR rd, CSR csr, GPR rs) noexcept;

diff --git a/src/assembler.cpp b/src/assembler.cpp
@@ -682,6 +682,16 @@ void Assembler::CZERO_NEZ(GPR rd, GPR value, GPR condition) noexcept {
     EmitRType(m_buffer, 0b0000111, condition, value, 0b111, rd, 0b0110011);
 }
 
+// XTheadCondMov Extension Instructions
+
+void Assembler::TH_MVEQZ(GPR rd, GPR value, GPR condition) noexcept {
+    EmitRType(m_buffer, 0b0100000, condition, value, 0b001, rd, 0b0001011);
+}
+
+void Assembler::TH_MVNEZ(GPR rd, GPR value, GPR condition) noexcept {
+    EmitRType(m_buffer, 0b0100001, condition, value, 0b001, rd, 0b0001011);
+}
+
 // Zicsr Extension Instructions
 
 void Assembler::CSRRC(GPR rd, CSR csr, GPR rs) noexcept {

diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
@@ -18,6 +18,7 @@ add_executable(${PROJECT_NAME}
     src/assembler_rvq_tests.cpp
     src/assembler_rvv_tests.cpp
     src/assembler_vector_crypto_tests.cpp
+    src/assembler_xthead_tests.cpp
     src/assembler_zabha_tests.cpp
     src/assembler_zacas_tests.cpp
     src/assembler_zawrs_tests.cpp

diff --git a/tests/src/assembler_xthead_tests.cpp b/tests/src/assembler_xthead_tests.cpp
@@ -0,0 +1,33 @@
+#include <catch/catch.hpp>
+
+#include <biscuit/assembler.hpp>
+
+#include "assembler_test_utils.hpp"
+
+using namespace biscuit;
+
+TEST_CASE("TH.MVEQZ", "[XThead]") {
+    uint32_t value = 0;
+    auto as = MakeAssembler64(value);
+
+    as.TH_MVEQZ(x31, x30, x29);
+    REQUIRE(value == 0x41DF1F8B);
+
+    as.RewindBuffer();
+
+    as.TH_MVEQZ(x1, x2, x3);
+    REQUIRE(value == 0x4031108B);
+}
+
+TEST_CASE("TH.MVNEZ", "[XThead]") {
+    uint32_t value = 0;
+    auto as = MakeAssembler64(value);
+
+    as.TH_MVNEZ(x31, x30, x29);
+    REQUIRE(value == 0x43DF1F8B);
+
+    as.RewindBuffer();
+
+    as.TH_MVNEZ(x1, x2, x3);
+    REQUIRE(value == 0x4231108B);
+}