Welcome to my GitHub profile! I'm a passionate developer always eager to learn and explore new technologies. Here, you'll find a collection of my projects, contributions, and more.
- 🌱 Currently learning: Full-Stack Development and Cloud Computing
- 🔭 Working on: Various system-level and application-level projects
- 💬 Ask me about: SystemVerilog, Python, C++, Assembly
- 📫 How to reach me:
- Email: [email protected]
- LinkedIn: Kashaf's LinkedIn
- Twitter: Kashaf's Twitter
Here are some of my favorite projects:
- University-Labs: Contains various lab assignments and projects in Assembly language.
- Quartus-Projects: A collection of SystemVerilog projects using Quartus.
- FYP-material-kashaf: Final Year Project materials primarily in SystemVerilog and Verilog.
- skills-introduction-to-github: My clone repository.
- ssgc_internship_material: Internship materials and projects in C++.
- Kickstart-for-Verilator: A sample presentation on how to get started with Verilator.
- CodeInfiniteX-Python-Tasks: Python tasks and assignments for CodeInfiniteX internship.
- DreamBig-Internship-Assignmnet-Codes: Internship assignments in C++, SystemVerilog, and Makefile.
- SystemVerilog: Sample space for SystemVerilog code uploads.
Thanks for visiting my profile! Have a great day! 😊