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Updates to SAM4L clocking. Still not finished
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gregory-nutt committed Jun 5, 2013
1 parent fd3e0f7 commit a64d048
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Showing 4 changed files with 362 additions and 57 deletions.
5 changes: 5 additions & 0 deletions nuttx/arch/arm/src/sam34/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -141,6 +141,11 @@ config ARCH_CHIP_SAM4S

menu "AT91SAM3 Peripheral Support"

config SAM_PICOCACHE
bool "PICOCACHE"
depends on ARCH_CHIP_SAM4L
default y

config SAM34_DMA
bool "DMA"
default n
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10 changes: 7 additions & 3 deletions nuttx/arch/arm/src/sam34/chip/sam4l_pm.h
Original file line number Diff line number Diff line change
Expand Up @@ -132,13 +132,15 @@
/* CPU Clock Select Register Bit-field Definitions */

#define PM_CPUSEL_SHIFT (0) /* Bits 0-2: CPU Clock Select */
#define PM_CPUSEL_MASK (7 << PM_CPUSEL_CPUSEL_SHIFT)
#define PM_CPUSEL_CPUDIV (1 << 7) /* Bit 7: CPU Division */
#define PM_CPUSEL_MASK (7 << PM_CPUSEL_SHIFT)
# define PM_CPUSEL(n) ((n) << PM_CPUSEL_SHIFT)
#define PM_CPUSEL_DIV (1 << 7) /* Bit 7: CPU Division */

/* PBA/PBB/PBC/PBD Clock Select Register Bit-field Definitions */

#define PM_PBSEL_SHIFT (0) /* Bits 0-2: PBx Clock Select */
#define PM_PBSEL_MASK (7 << PM_PBASEL_SHIFT)
#define PM_PBSEL_MASK (7 << PM_PBSEL_SHIFT)
# define PM_PBSEL(n) ((n) << PM_PBSEL_SHIFT)
#define PM_PBSEL_DIV (1 << 7) /* Bit 7: PBx Division */

/* CPU Mask Register Bit-field Definitions */
Expand Down Expand Up @@ -228,8 +230,10 @@

#define PM_UNLOCK_ADDR_SHIFT (0) /* Bits 0-9: Unlock Address */
#define PM_UNLOCK_ADDR_MASK (0x3ff << PM_UNLOCK_ADDR_SHIFT)
# define PM_UNLOCK_ADDR(n) ((n) << PM_UNLOCK_ADDR_SHIFT)
#define PM_UNLOCK_KEY_SHIFT (24) /* Bits 24-31: Unlock Key */
#define PM_UNLOCK_KEY_MASK (0xff << PM_UNLOCK_KEY_SHIFT)
# define PM_UNLOCK_KEY(n) ((n) << PM_UNLOCK_KEY_SHIFT)

/* Interrupt Enable Register Bit-field Definitions */
/* Interrupt Disable Register Bit-field Definitions */
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