Skip to content

Commit bf3d1f2

Browse files
sys-igcigcbot
authored andcommitted
[Autobackout][FunctionalRegression]Revert of change: f6b3152: Optimize SPIR-V / OpenCL C 'bitselect' builtin function
Add a dedicated intrinsic that guarantees 'bitselect' builtin is implemented with one 'bfn' instruction.
1 parent f2d241e commit bf3d1f2

File tree

12 files changed

+13
-147
lines changed

12 files changed

+13
-147
lines changed

IGC/BiFModule/Headers/bif_flag_controls.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,6 @@ BIF_FLAG_CONTROL(bool, UseNativeFP16AtomicMinMax)
2323
BIF_FLAG_CONTROL(bool, HasInt64SLMAtomicCAS)
2424
BIF_FLAG_CONTROL(bool, UseNativeFP64GlobalAtomicAdd)
2525
BIF_FLAG_CONTROL(bool, UseNative64BitIntBuiltin)
26-
BIF_FLAG_CONTROL(bool, UseBfn)
2726
BIF_FLAG_CONTROL(bool, HasThreadPauseSupport)
2827
BIF_FLAG_CONTROL(bool, UseNative64BitFloatBuiltin)
2928
BIF_FLAG_CONTROL(bool, hasHWLocalThreadID)

IGC/BiFModule/Implementation/IGCBiF_Intrinsics.cl

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -224,10 +224,6 @@ double __builtin_IB_dmin(double, double) __attribute__((const));
224224
double __builtin_IB_dmax(double, double) __attribute__((const));
225225
#endif
226226

227-
// Boolean function on three sources
228-
short __builtin_IB_bfn_i16(short, short, short, uchar) __attribute__((const));
229-
int __builtin_IB_bfn_i32(int, int, int, uchar) __attribute__((const));
230-
231227
// Atomic operations
232228
int __builtin_IB_atomic_add_global_i32(__global int*, int);
233229
int __builtin_IB_atomic_add_local_i32(__local int*, int);

IGC/BiFModule/Implementation/Relational/bitselect.cl

Lines changed: 12 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -9,81 +9,43 @@ SPDX-License-Identifier: MIT
99
#include "../include/BiF_Definitions.cl"
1010
#include "../../Headers/spirv.h"
1111

12-
// Bitselect can be implemented with the following boolean function:
13-
// s0 & s1 | ~s0 & s2
14-
// where s0 = c, s1 = b, s2 = a
15-
// This maps to boolean function 0xD8.
1612

1713
INLINE
1814
char SPIRV_OVERLOADABLE SPIRV_OCL_BUILTIN(bitselect, _i8_i8_i8, )( char a, char b, char c )
1915
{
20-
if (BIF_FLAG_CTRL_GET(UseBfn))
21-
{
22-
return (char) __builtin_IB_bfn_i16((short)as_uchar(c), (short)as_uchar(b), (short)as_uchar(a), 0xD8);
23-
}
24-
else
25-
{
26-
char temp;
27-
temp = (c & b) | (~c & a);
28-
return temp;
29-
}
16+
char temp;
17+
temp = (c & b) | (~c & a);
18+
return temp;
3019
}
3120

3221
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_3ARGS( bitselect, char, char, i8 )
3322

3423
INLINE
3524
short SPIRV_OVERLOADABLE SPIRV_OCL_BUILTIN(bitselect, _i16_i16_i16, )( short a, short b, short c )
3625
{
37-
if (BIF_FLAG_CTRL_GET(UseBfn))
38-
{
39-
return __builtin_IB_bfn_i16(c, b, a, 0xD8);
40-
}
41-
else
42-
{
43-
short temp;
44-
temp = (c & b) | (~c & a);
45-
return temp;
46-
}
26+
short temp;
27+
temp = (c & b) | (~c & a);
28+
return temp;
4729
}
4830

4931
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_3ARGS( bitselect, short, short, i16 )
5032

5133
INLINE
5234
int SPIRV_OVERLOADABLE SPIRV_OCL_BUILTIN(bitselect, _i32_i32_i32, )( int a, int b, int c )
5335
{
54-
if (BIF_FLAG_CTRL_GET(UseBfn))
55-
{
56-
return __builtin_IB_bfn_i32(c, b, a, 0xD8);
57-
}
58-
else
59-
{
60-
int temp;
61-
temp = (c & b) | (~c & a);
62-
return temp;
63-
}
36+
int temp;
37+
temp = (c & b) | (~c & a);
38+
return temp;
6439
}
6540

6641
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_3ARGS( bitselect, int, int, i32 )
6742

6843
INLINE
6944
long SPIRV_OVERLOADABLE SPIRV_OCL_BUILTIN(bitselect, _i64_i64_i64, )( long a, long b, long c )
7045
{
71-
if (BIF_FLAG_CTRL_GET(UseBfn))
72-
{
73-
int2 tmpA = as_int2(a);
74-
int2 tmpB = as_int2(b);
75-
int2 tmpC = as_int2(c);
76-
int2 tmpResult;
77-
tmpResult.s0 = __builtin_IB_bfn_i32(tmpC.s0, tmpB.s0, tmpA.s0, 0xD8);
78-
tmpResult.s1 = __builtin_IB_bfn_i32(tmpC.s1, tmpB.s1, tmpA.s1, 0xD8);
79-
return as_long(tmpResult);
80-
}
81-
else
82-
{
83-
long temp;
84-
temp = (c & b) | (~c & a);
85-
return temp;
86-
}
46+
long temp;
47+
temp = (c & b) | (~c & a);
48+
return temp;
8749
}
8850

8951
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_3ARGS( bitselect, long, long, i64 )

IGC/Compiler/Builtins/BIFFlagCtrl/BIFFlagCtrlResolution.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,8 +66,6 @@ void BIFFlagCtrlResolution::FillFlagCtrl() {
6666
PtrCGC->platform.hasThreadPauseSupport());
6767
BIF_FLAG_CTRL_SET(UseNative64BitFloatBuiltin,
6868
!PtrCGC->platform.hasNoFP64Inst());
69-
BIF_FLAG_CTRL_SET(UseBfn, IGC_IS_FLAG_ENABLED(EnableBfn) &&
70-
PtrCGC->platform.supportBfnInstruction());
7169
BIF_FLAG_CTRL_SET(hasHWLocalThreadID, PtrCGC->platform.hasHWLocalThreadID());
7270
BIF_FLAG_CTRL_SET(CRMacros, PtrCGC->platform.hasCorrectlyRoundedMacros());
7371
BIF_FLAG_CTRL_SET(

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -9604,9 +9604,6 @@ void EmitPass::EmitGenIntrinsicMessage(llvm::GenIntrinsicInst* inst)
96049604
case GenISAIntrinsic::GenISA_WaveClusteredInterleave:
96059605
emitWaveClusteredInterleave(inst);
96069606
break;
9607-
case GenISAIntrinsic::GenISA_bfn:
9608-
emitBfn(inst);
9609-
break;
96109607
case GenISAIntrinsic::GenISA_dp4a_ss:
96119608
case GenISAIntrinsic::GenISA_dp4a_uu:
96129609
case GenISAIntrinsic::GenISA_dp4a_su:
@@ -17792,19 +17789,6 @@ void EmitPass::emitFPOWithNonDefaultRoundingMode(llvm::GenIntrinsicInst* inst)
1779217789
ResetRoundingMode(inst);
1779317790
}
1779417791

17795-
void EmitPass::emitBfn(llvm::GenIntrinsicInst* inst)
17796-
{
17797-
IGC_ASSERT_MESSAGE(isa<ConstantInt>(inst->getArgOperand(3)), "booleanFuncCtrl must be const!");
17798-
const uint8_t booleanFuncCtrl = int_cast<uint8_t>(cast<ConstantInt>(inst->getArgOperand(3))->getZExtValue());
17799-
17800-
CVariable* src0 = GetSymbol(inst->getOperand(0));
17801-
CVariable* src1 = GetSymbol(inst->getOperand(1));
17802-
CVariable* src2 = GetSymbol(inst->getOperand(2));
17803-
17804-
m_encoder->Bfn(booleanFuncCtrl, m_destination, src0, src1, src2);
17805-
m_encoder->Push();
17806-
}
17807-
1780817792
void EmitPass::emitftoi(llvm::GenIntrinsicInst* inst)
1780917793
{
1781017794
IGC_ASSERT_MESSAGE(inst->getOperand(0)->getType()->isFloatingPointTy(), "Unsupported type");

IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -455,8 +455,6 @@ class EmitPass : public llvm::FunctionPass
455455
void emitftoi(llvm::GenIntrinsicInst* inst);
456456
void emitCtlz(const SSource& source);
457457

458-
void emitBfn(llvm::GenIntrinsicInst* inst);
459-
460458

461459
// VME
462460
void emitVMESendIME(llvm::GenIntrinsicInst* inst);

IGC/Compiler/CISACodeGen/WIAnalysis.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1508,8 +1508,7 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
15081508
GII_id == GenISAIntrinsic::GenISA_LSC2DBlockCreateAddrPayload ||
15091509
GII_id == GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload ||
15101510
GII_id == GenISAIntrinsic::GenISA_PredicatedLoad ||
1511-
GII_id == GenISAIntrinsic::GenISA_PredicatedStore ||
1512-
GII_id == GenISAIntrinsic::GenISA_bfn)
1511+
GII_id == GenISAIntrinsic::GenISA_PredicatedStore)
15131512
{
15141513
switch (GII_id)
15151514
{

IGC/Compiler/CISACodeGen/opCode.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,6 @@ DECLARE_OPCODE(GenISA_dp4a_ss, GenISAIntrinsic, llvm_dp4a_ss, false, true, true,
156156
DECLARE_OPCODE(GenISA_dp4a_uu, GenISAIntrinsic, llvm_dp4a_uu, false, true, true, true, false, false, false)
157157
DECLARE_OPCODE(GenISA_dp4a_su, GenISAIntrinsic, llvm_dp4a_su, false, true, true, true, false, false, false)
158158
DECLARE_OPCODE(GenISA_dp4a_us, GenISAIntrinsic, llvm_dp4a_us, false, true, true, true, false, false, false)
159-
DECLARE_OPCODE(GenISA_bfn, GenISAIntrinsic, llvm_bfn, false, false, false, false, false, false, false)
160159

161160
// GS Intrinsics
162161
DECLARE_OPCODE(GenISA_OUTPUTGS, GenISAIntrinsic, llvm_output_gs, false, false, false, false, false, false, false)

IGC/Compiler/Optimizer/OCLBIUtils.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1758,9 +1758,6 @@ CBuiltinsResolver::CBuiltinsResolver(CImagesBI::ParamMap* paramMap, CImagesBI::I
17581758

17591759
m_CommandMap[StringRef("__builtin_IB_samplepos")] = CSamplePos::create();
17601760

1761-
m_CommandMap["__builtin_IB_bfn_i16"] = CSimpleIntrinMapping::create(GenISAIntrinsic::GenISA_bfn);
1762-
m_CommandMap["__builtin_IB_bfn_i32"] = CSimpleIntrinMapping::create(GenISAIntrinsic::GenISA_bfn);
1763-
17641761
// `dp4a` built-ins
17651762
m_CommandMap["__builtin_IB_dp4a_ss"] = CSimpleIntrinMapping::create(GenISAIntrinsic::GenISA_dp4a_ss, false);
17661763
m_CommandMap["__builtin_IB_dp4a_uu"] = CSimpleIntrinMapping::create(GenISAIntrinsic::GenISA_dp4a_uu, false);

IGC/GenISAIntrinsics/generator/input/Intrinsic_definitions.yml

Lines changed: 0 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -11730,31 +11730,3 @@ intrinsics:
1173011730
memory_effects:
1173111731
- !<MemoryRestriction>
1173211732
memory_access: !MemoryAccessType NoModRef
11733-
- !<IntrinsicDefinition>
11734-
name: "GenISA_bfn"
11735-
comment: "Performs an arbitrary boolean logical operation on three sources."
11736-
return_definition: !<ReturnDefinition>
11737-
type_definition: *any_int
11738-
comment: "result"
11739-
arguments:
11740-
- !<ArgumentDefinition>
11741-
name: Arg0
11742-
type_definition: *ref_0_
11743-
comment: "source0 (a)"
11744-
- !<ArgumentDefinition>
11745-
name: Arg1
11746-
type_definition: *ref_0_
11747-
comment: "source1 (b)"
11748-
- !<ArgumentDefinition>
11749-
name: Arg2
11750-
type_definition: *ref_0_
11751-
comment: "source2 (c)"
11752-
- !<ArgumentDefinition>
11753-
name: Arg3
11754-
type_definition: *i8
11755-
comment: "Boolean function"
11756-
attributes:
11757-
- !AttributeID "NoUnwind"
11758-
memory_effects:
11759-
- !<MemoryRestriction>
11760-
memory_access: !MemoryAccessType NoModRef

IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBIFFlagCtrlResolution.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,6 @@ void GenXBIFFlagCtrlResolution::FillFlagCtrl() {
8989
BIF_FLAG_CTRL_SET(hasHWLocalThreadID, false);
9090
BIF_FLAG_CTRL_SET(APIRS, false);
9191
BIF_FLAG_CTRL_SET(UseLSC, false);
92-
BIF_FLAG_CTRL_SET(UseBfn, false);
9392
BIF_FLAG_CTRL_SET(ForceL1Prefetch, false);
9493
BIF_FLAG_CTRL_SET(UseNativeFP64GlobalAtomicAdd, false);
9594
BIF_FLAG_CTRL_SET(MaxHWThreadIDPerSubDevice, 1);

IGC/ocloc_tests/Builtins/bitselect.cl

Lines changed: 0 additions & 37 deletions
This file was deleted.

0 commit comments

Comments
 (0)