@@ -3366,10 +3366,68 @@ namespace IGC
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V (vKernel->GetPredefinedSurface (surfacevar, PREDEFINED_SURFACE_T255));
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break ;
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case ESURFACE_SCRATCH:
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- // NOTE: For scratch surface, we need to shr the surface state offset coming in R0.5 by 4.
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- // This shr operation is generated by vISA in HDC path
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+ {
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+ // For scratch surface, we need to shr the surface state offset coming in R0.5 by 4
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+ // This is because the scratch offset is passed in via r0.5[31:10],
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+ // but the BSS/SS descriptor expects the offset in [31:6] bits, thus we must shift it right by 4
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+ // We also need to and r0.5 with 0xFFFFFC00 to retrieve bits 31:10
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+
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+ // TBD is it needed or we will have the bits 9:0 are reset already in the payload?
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+ // (W) and (1) sso r0.5 0xFFFFC00, placed at kernel entry
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+ VISA_GenVar* r0Var = nullptr ;
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+ VISA_VectorOpnd* surfOpnd_r0_5 = nullptr ;
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+ uint32_t imm_data_dw = 0xFFFFFC00 ;
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+ VISA_VectorOpnd* andOpnd = nullptr ;
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+ VISA_VectorOpnd* surfOpAndDst = nullptr ;
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+
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V (vKernel->GetPredefinedSurface (surfacevar, PREDEFINED_SURFACE_SCRATCH));
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+ V (vKernel->GetPredefinedVar (r0Var, PREDEFINED_R0));
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+
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+ CVariable* surfOpAndVar = m_program->GetNewVariable (1 , ISA_TYPE_UD, EALIGN_DWORD, true , " SurfaceOpnd" );
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+ V (vKernel->CreateVISADstOperand (surfOpAndDst, GetVISAVariable (surfOpAndVar), 1 , 0 , 0 ));
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+
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+ V (vKernel->CreateVISASrcOperand (surfOpnd_r0_5, r0Var, MODIFIER_NONE, 0 , 1 , 0 , 0 , 5 ));
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+ V (vKernel->CreateVISAImmediate (andOpnd, &imm_data_dw, ISA_TYPE_UD));
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+ V (vKernel->AppendVISAArithmeticInst (
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+ ISA_AND,
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+ nullptr ,
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+ false ,
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+ vISA_EMASK_M1_NM,
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+ EXEC_SIZE_1,
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+ surfOpAndDst,
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+ surfOpnd_r0_5,
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+ andOpnd));
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+
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+ // if use new extend message descriptor format
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+ // (W) shr (1) a0.0 ss0 0x4
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+ // else
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+ // (W) shl (1) a0.0 ss0 0x2
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+
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+ VISA_VectorOpnd* surfOpndShiftDst = nullptr ;
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+ VISA_VectorOpnd* surfOpnd_r0_5_bits_31_10 = nullptr ;
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+ VISA_VectorOpnd* shiftOpnd = nullptr ;
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+ bool useNewExtMsgFormat = m_program->m_Platform ->hasScratchSurface ();
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+ // Not sure that we have a case of using bindless scratch surface on
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+ // platforms that use old ExtMsgFormat a0[12:31] as surface-state
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+ // heap offset. However, the logic is maintained when moving from
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+ // finalizer to IGC
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+ uint16_t imm_data_w = useNewExtMsgFormat ? 4 : 2 ;
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+ ISA_Opcode shiftOpcode = useNewExtMsgFormat ? ISA_SHR : ISA_SHL;
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+
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+ surfOpnd_r0_5_bits_31_10 = GetSourceOperandNoModifier (surfOpAndVar);
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+ V (vKernel->CreateVISAImmediate (shiftOpnd, &imm_data_w, ISA_TYPE_UW));
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+ V (vKernel->CreateVISAStateOperand (surfOpndShiftDst, surfacevar, 0 , true ));
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+ V (vKernel->AppendVISAArithmeticInst (
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+ shiftOpcode,
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+ nullptr ,
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+ false ,
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+ vISA_EMASK_M1_NM,
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+ EXEC_SIZE_1,
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+ surfOpndShiftDst,
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+ surfOpnd_r0_5_bits_31_10,
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+ shiftOpnd));
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break ;
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+ }
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default :
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IGC_ASSERT_MESSAGE (0 , " Invalid surface" );
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break ;
@@ -7304,8 +7362,6 @@ namespace IGC
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// For scratch surface, we need to shr the surface state offset coming in R0.5 by 4
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// This is because the scratch offset is passed in via r0.5[31:10],
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// but the BSS/SS descriptor expects the offset in [31:6] bits, thus we must shift it right by 4
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-
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- // NOTE: This shr operation is generated by IGC in LSC path, where as in HDC path it is done by vISA
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VISA_GenVar* r0Var = nullptr ;
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V (vKernel->GetPredefinedVar (r0Var, PREDEFINED_R0));
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VISA_VectorOpnd* surfOpnd = nullptr ;
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