All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog, and this project adheres to Semantic Versioning.
- Replace
memmapcrate withmemmap2as the former is unmaintained
- Add CIRCT dependency
- Add
circtandcirct-syscrates - Add
--format=mlir-nativeoption to use CIRCT for output emission - Add implicit cast from integer to time types
- Add
-Vfunc-argsand-Vcall-argsverbosity option - Add support for functions and function calls (#168)
- Add support for
return,continue,breakstatements
- Migrate code generation to use CIRCT in parallel to LLHD crate
- Fix equality and inequality comparisons of non-integer types
- Fix parser ambiguity for function arguments
- Fix parsing of empty call arguments (#213)
- Fix an issue where net declarations with implicit type would not impose a type context properly
- Make unknown system tasks report as warning instead of error
- Fix MLIR output test case
- Fix operation type of reductions not being equal to the argument type
- Update
llhdto 0.16
- Fix ports with explicit direction carrying over previous port type data (#224)
- Fix generate regions being ignored during code generation (#228)
- Add
--outputoption to optionally specify output file - Add
--formatoption to optionally specify output format (LLHD or MLIR)
- Update VHDL crate to same
llhdversion as SystemVerilog - Increase minimum rustc version to 1.43.
- Update
llhdto 0.15
- Fix procedural assignments to concatenations, e.g.
{a,b} = c(#185) - Fix bit-/part-selects into ranges with non-zero offse, e.g.
x[1]intologic [8:1] x(#194)
- Remove the inlined salsa crate
- Add support for
x**ywith power-of-twoxor constanty(#193) - Add limited support for
$countones,$onehot,$onehot0,$isunknown,$left,$right,$low,$high,$increment,$size(#204) - Add emission of string literals (#161)
- Add constant casts between
stringand bit vectors (#161) - Add constant string equality comparison (#161)
- Make unsupported system task an error (#206)
- Update
llhdto 0.14.1
- Fix implementation of assignment expressions (#172, #190)
- Fix emission of shadow variables for read-write variables in processes
- Fix assignments generating code multiple times
- Fix
regbeing a proper alias oflogic(#189) - Fix genvar initialization in for-generate (#192)
- Fix assignment operators in genvar steps
- Fix casting between vectors of different directions (#188)
- Fix precedence issue with dimensions of named types
- Fix interface arrays not implicitly picking modport
- Fix struct member access not honoring parameters
- Ignore empty file names (e.g.
"") rather than emitting a warning - Omit superfluous prb/drv for trivial signal connections in instances (#205)
- Fix modport selection on interface instances (#199)
- Fix wire declarations requiring default assignment to be constant (#198)
- Fix
@(...)statements not re-sampling signals afterwait(#197)
- Add support for interfaces (#145)
- Overhaul type system to support unpacked types (#146)
- Fix type context inference for array/struct pattern fields (#166)
- Add parsing support for
this,null,$expressions
- Scope checking and name resolution is now performed upfront
- Increase quality of AST data structure (#130)
- Allow names to resolve to foreach-loop indices (#175)
- Allow names to resolve to instances (#177)
- Fix scoping of generate blocks (#176)
- Fix scope and name resolution to support large designs (#171)
- Fix expressions in instance port lists forgetting parameter bindings
- Add parsing support for
assert finalassertions (#139) - Add parsing support for
default disablestatements (#140) - Add codegen support for case/wildcard equality operators (#147)
- Add parsing support for
implementsin classs declarations - Add
moore-derivecrate - Add
-Vconstsand-Vinstsverbosity option - Executable honors the
MOORE_LOGverbosity environment variable - Accept types in associative arrays
- Add support for
type(...)type references
- Update
llhdto 0.13 (#135) - Change default optimization level to
-O1(#163) - Improve handling of macro argument defaults
- Fix sign casts (#138)
- Fix parsing of import declarations in module headers (#136)
- Fix non-constant initial expressions in variabel declarations
- Fix parsing of
newexpression without argument
- Remove
rustc-serializedependency (#157) - Remove
-vand-tlogging controls
- Add the
--syntaxoption to only syntax-check input files. - Add support for
__FILE__and__LINE__directives. - Add support for
resetalldirective. - Add support for
celldefineandendcelldefinedirectives. - Add support for
default_nettypedirective. - Add support for
begin_keywordsandend_keywordsdirectives. - Add support for
linedirective. - Add support for
unconnected_driveandnounconnected_drivedirectives. - Add full support for ANSI and non-ANSI port lists. (#128)
- Add the
-Vportsverbosity option.
- Fix parsing of keywords
implements,interconnect,nettype,soft.
- Add bit-vec dependency.
- Add support for
xandzbits in literals. - Add support for
casexandcasezstatements. - Add shadow variables for blocking assignments.
- Interpret
regtype aslogic.
- Improved output of
-Vtypesverbosity option. - Improve type checking quality with separate queries.
- Parent relationship of HIR nodes lowered from AST.
- Type of part-selects now reflects length of selection.
- Use operation type for comparisons and inside expressions.
- Don't consider type context for comparison operations.
- Fix implicit boolean casts in if, for, while, do/while, and event statements.
- Fix
$unsignedand$signedtype checking. - Fix right-hand side casting in assignments.
- Fix implicit array unpacking.
- Fix code generated for concatenation.
- Fix nested
ifdefin preprocessor. - Fix parsing of delays on net declarations.
- Fix parsing of unparenthesized identifiers as delay value (following
#). - Fix parsing of DPI imports.
- Fix parsing of elaboration system tasks.
- Fix implicitly-typed variables.
- Parsing of
timeunitandtimeprecisionstatements. (#92) - Parsing of
insideexpressions. (#93) - Support for the
**operators. (#94) - Support for the
::operator. - Support for the
casestatement. - Parse cast expressions.
- Accept
``,`\, and`"in preprocessor. - Parse optional lifetime specifiers after
taskorfunction. - Support for enum types. (#79)
- Support for package declarations.
- Support for the
$signedand$unsignedbuiltin functions. - Support auto-connected and unconnected ports.
- Support for the
{...}concatenation and{N{...}}repetition operators. - Add
-Onswitch to control optimization level. - Add MIR for rvalues and lvalues. (#104)
- Support for the
`undefand`undefinealldirectives. - Inline the salsa crate.
- Update llhd to v0.9.0.
- Support for the
ty'(expr)cast expression. - Increase minimum rustc version to 1.36.
- Continuous assignments resolve in epsilon time. (#89)
- Ternary operator now also supported at entitiy-level.
- Fix underscores in preprocessor macros.
- Fix parsing of size cast expressions, e.g.
32'(x). (#113) - Recognize
*.vhfiles as verilog source code.
- Support for variable declarations. (#70)
- Support for struct types. (#76)
- Support for packed arrays. (#75)
- Support for the
*,/,%,<<,<<<,>>, and>>>operators. - Support for the
$clog2and$bitsbuiltin functions. (#81, #88) - Support for non-blocking assignments with and without delay. (#82)
- Support for based integer literals, and
'0, and'1. (#84) - Support for the ternary operator in processes and functions. (#83)
- Support for the unary
+,-,&,~&,|,~|,^, and^~operators. (#86) - Support for
+=,-=,*=,/=,%=,&=,|=,^=,<<=,<<<=,>>=, and>>>=assignments. (#87)
- Fix blocking assignments, making them actually block. (#78)
- Fix variables with implicit types failing to infer their type.
- Fix error when parameters or genvars are used in process. (#85)
- Update llhd to v0.5.0.
- Make emitted process names more descriptive.
- Remove obsolete code in the svlog syntax crate. (#80)
- Support for parameter declarations. (#71)
- Support for typedefs. (#74)
- Support for port assignments in instantiations. (#77)
- Support for continuous assignments in modules.
- Support for bitwise logic operators.
- Fix assigning values to output ports.
- Fix semantics of
always_combblocks; they are now run once at startup and then implicitly when an input changes.
- The first verbosity level (
-v) does no longer print info lines.
- Fix code generated by
repeatstatement.
- Support for if-generate and for-generate blocks. (#72, #73)
- Support for value and type parameters.
- Support for module instantiations and processes.
- Support for signal declarations.
- Use salsa to implement SystemVerilog queries.
- Add usage example to README, plus some cleanup.
- Switch to dual-licensing.
- Update llhd to v0.3.0.
- Improve command line help page.
- Initial release
- Basic SystemVerilog and VHDL parsing