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mips64: Fix memory initialization and interrupt handling issues #17

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@clktmr clktmr commented Apr 28, 2025

See commit messages for details.

clktmr added 2 commits April 28, 2025 12:49
memclrNoHeapPointers will check the MIPS64X struct whether to use an
SIMD instruction set, which isn't initialized at this point. As a safe
fallback disable all optional instruction sets (currently only MSA)
until proper initialization.
clktmr added 2 commits April 28, 2025 13:02
ares will report unusual cache accesses if a CACHE OP is performed on
non-cacheable addresses. It's not a bug, but to make ares happy do the
cache ops in the uncached segment.
@clktmr clktmr changed the title Fix memory initialization in mips64 mips64: Fix memory initialization and interrupt handling issues May 9, 2025
@clktmr clktmr changed the title mips64: Fix memory initialization and interrupt handling issues WIP: mips64: Fix memory initialization and interrupt handling issues May 10, 2025
@clktmr clktmr marked this pull request as draft May 10, 2025 10:44
@clktmr clktmr changed the title WIP: mips64: Fix memory initialization and interrupt handling issues mips64: Fix memory initialization and interrupt handling issues May 10, 2025
clktmr added 3 commits May 22, 2025 23:44
Disabling of interrupts was broken since after the call to sysirqctl(),
the STATUS register would be restored from exception context saved on
the stack. The globalIRQMask is now stored separately and always used to
restore the mask for external interrupts.

As a side-effect, the system will now boot with all external interrupts
disabled and waits for the user application to enable them.
REGTMP is the scratch register used by the assembler. Saving it with
GPRS is bad because one needs to be extra careful writing assembly that
won't clobber REGTMP as long as it's not saved or after it's restored.

Instead try to save it as early and restore it as late as possible to
prevent bugs, that will only be visible in the disassembly.
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