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mips64: Fix memory initialization and interrupt handling issues - #17
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memclrNoHeapPointers will check the MIPS64X struct whether to use an SIMD instruction set, which isn't initialized at this point. As a safe fallback disable all optional instruction sets (currently only MSA) until proper initialization.
ares will report unusual cache accesses if a CACHE OP is performed on non-cacheable addresses. It's not a bug, but to make ares happy do the cache ops in the uncached segment.
clktmr
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clktmr
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clktmr
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May 10, 2025 10:44
clktmr
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Disabling of interrupts was broken since after the call to sysirqctl(), the STATUS register would be restored from exception context saved on the stack. The globalIRQMask is now stored separately and always used to restore the mask for external interrupts. As a side-effect, the system will now boot with all external interrupts disabled and waits for the user application to enable them.
REGTMP is the scratch register used by the assembler. Saving it with GPRS is bad because one needs to be extra careful writing assembly that won't clobber REGTMP as long as it's not saved or after it's restored. Instead try to save it as early and restore it as late as possible to prevent bugs, that will only be visible in the disassembly.
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