update docs

README.md

@@ -30,7 +30,7 @@ EF_UART is a Soft IP with the following features:
 
  APB, AHBL, and Wishbone wrappers are provided. All wrappers provide the same programmer's interface as outlined in the following sections.
 
-#### Wrapped IP System Integration
+### Wrapped IP System Integration
 
 Based on your use case, use one of the provided wrappers or create a wrapper for your system bus type. For an example of how to integrate the wishbone wrapper:
 ```verilog
@@ -50,12 +50,19 @@ EF_UART_WB INST (
 	.tx(tx)
 );
 ```
-#### Wrappers with DFT support
+### Wrappers with DFT support
 Wrappers in the directory ``/hdl/rtl/bus_wrappers/DFT`` have an extra input port ``sc_testmode`` to disable the clock gate whenever the scan chain testmode is enabled.
+### External IO interfaces
+|IO name|Direction|Width|Description|
+|---|---|---|---|
+|rx|input|1|RX connected to the external interface|
+|tx|output|1|TX connected to external interface|
+### Interrupt Request Line (irq)
+This IP generates interrupts on specific events, which are described in the [Interrupt Flags](#interrupt-flags) section bellow. The IRQ port should be connected to the system interrupt controller.
 
 ## Implementation example  
 
-The following table is the result for implementing the EF_UART IP with different wrappers using Sky130 PDK and [OpenLane2](https://github.com/efabless/openlane2) flow.
+The following table is the result for implementing the EF_UART IP with different wrappers using Sky130 HD library and [OpenLane2](https://github.com/efabless/openlane2) flow.
 |Module | Number of cells | Max. freq |
 |---|---|---|
 |EF_UART|1590| 277 |
@@ -201,13 +208,13 @@ TX_FIFO Flush Register
 The wrapped IP provides four registers to deal with interrupts: IM, RIS, MIS and IC. These registers exist for all wrapper types.
 
 Each register has a group of bits for the interrupt sources/flags.
-- `IM` [offset: 0xff00]: is used to enable/disable interrupt sources.
+- `IM` [offset: ``0xff00``]: is used to enable/disable interrupt sources.
 
-- `RIS` [offset: 0xff08]: has the current interrupt status (interrupt flags) whether they are enabled or disabled.
+- `RIS` [offset: ``0xff08``]: has the current interrupt status (interrupt flags) whether they are enabled or disabled.
 
-- `MIS` [offset: 0xff04]: is the result of masking (ANDing) RIS by IM.
+- `MIS` [offset: ``0xff04``]: is the result of masking (ANDing) RIS by IM.
 
-- `IC` [offset: 0xff0c]: is used to clear an interrupt flag.
+- `IC` [offset: ``0xff0c``]: is used to clear an interrupt flag.
 
 
 The following are the bit definitions for the interrupt registers:
@@ -232,8 +239,24 @@ The IP includes a clock gating feature that allows selective activation and deac
 VERILOG_DEFINES:
 - CLKG_SKY130_HD
 ```
+## Firmware Drivers:
+Firmware drivers for EF_UART can be found in the [fw](https://github.com/efabless/EF_UART/tree/main/fw) directory. EF_UART driver documentation  is available [here](https://github.com/efabless/EF_UART/blob/main/fw/README.md).
+You can also find an example C application using the EF_UART drivers [here]().
+## Installation:
+You can install the IP either by cloning this repository or by using [IPM](https://github.com/efabless/IPM).
+### 1. Using [IPM](https://github.com/efabless/IPM):
+- [Optional] If you do not have IPM installed, follow the installation guide [here](https://github.com/efabless/IPM/blob/main/README.md)
+- After installing IPM, execute the following command ```ipm install EF_UART```.
+> **Note:** This method is recommended as it automatically installs [EF_IP_UTIL](https://github.com/efabless/EF_IP_UTIL.git) as a dependency.
+### 2. Cloning this repo: 
+- Clone [EF_IP_UTIL](https://github.com/efabless/EF_IP_UTIL.git) repository, which includes the required modules from the common modules library, [ef_util_lib.v](https://github.com/efabless/EF_IP_UTIL/blob/main/hdl/ef_util_lib.v).
+```git clone https://github.com/efabless/EF_IP_UTIL.git```
+- Clone the IP repository
+```git clone https://github.com/efabless/EF_UART.git```
+
+### The Wrapped IP Interface 
 
-### The Interface 
+>**_NOTE:_** This section is intended for advanced users who wish to gain more information about the interface of the wrapped IP, in case they want to create their own wrappers.
 
 <img src="docs/_static/EF_UART.svg" width="600"/>
 
@@ -285,17 +308,3 @@ VERILOG_DEFINES:
 |parity_error_flag|output|1|Parity error flag|
 |overrun_flag|output|1|Overrun flag|
 |timeout_flag|output|1|Timeout flag|
-## Firmware Drivers:
-Firmware drivers for EF_UART can be found in the [fw](https://github.com/efabless/EF_UART/tree/main/fw) directory. EF_UART driver documentation  is available [here](https://github.com/efabless/EF_UART/blob/main/fw/README.md).
-You can also find an example C application using the EF_UART drivers [here]().
-## Installation:
-You can install the IP either by cloning this repository or by using [IPM](https://github.com/efabless/IPM).
-##### 1. Using [IPM](https://github.com/efabless/IPM):
-- [Optional] If you do not have IPM installed, follow the installation guide [here](https://github.com/efabless/IPM/blob/main/README.md)
-- After installing IPM, execute the following command ```ipm install EF_UART```.
-> **Note:** This method is recommended as it automatically installs [EF_IP_UTIL](https://github.com/efabless/EF_IP_UTIL.git) as a dependency.
-##### 2. Cloning this repo: 
-- Clone [EF_IP_UTIL](https://github.com/efabless/EF_IP_UTIL.git) repository, which includes the required modules from the common modules library, [ef_util_lib.v](https://github.com/efabless/EF_IP_UTIL/blob/main/hdl/ef_util_lib.v).
-```git clone https://github.com/efabless/EF_IP_UTIL.git```
-- Clone the IP repository
-```git clone https://github.com/efabless/EF_UART.git```

readme.txt

@@ -0,0 +1,45 @@
+/*
+	Copyright 2024 Efabless Corp.
+
+	Author: Efabless Corp. ([email protected])
+
+	Licensed under the Apache License, Version 2.0 (the "License");
+	you may not use this file except in compliance with the License.
+	You may obtain a copy of the License at
+
+	    http://www.apache.org/licenses/LICENSE-2.0
+
+	Unless required by applicable law or agreed to in writing, software
+	distributed under the License is distributed on an "AS IS" BASIS,
+	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+	See the License for the specific language governing permissions and
+	limitations under the License.
+
+*/
+
+IP_name: EF_UART
+Author: Efabless
+Directory Structure:
+
+    - fw 
+        - **EF_UART_regs.h**: Header file containing the register definitions for the EF_UART interface.
+        - **EF_UART.c**: C source file implementing the low-level driver functions for the EF_UART.
+        - **EF_UART.h**: Header file declaring the API functions and data structures for the EF_UART driver.
+        - **DEVICE_DRIVER.pdf**: Documentation for users to understand how to use the EF_UART driver and interface with the IP.
+
+    - hdl 
+        - rtl 
+            - **EF_UART.v**: Verilog source code for the EF_UART design, including the core logic of the UART module.
+            - **bus_wrappers**
+                - **EF_UART_AHBL.v**: Verilog wrapper to interface the EF_UART with the AMBA High-performance Bus (AHB-Lite) protocol.
+                - **EF_UART_APB.v**: Verilog wrapper to interface the EF_UART with the Advanced Peripheral Bus (APB) protocol.
+                - **EF_UART_WB.v**: Verilog wrapper to interface the EF_UART with the Wishbone bus protocol.
+            - **dft**
+                - **EF_UART_AHBL_DFT.v**: Verilog wrapper with Design for Test (DFT) support specific to the AHB-Lite interface of the EF_UART .
+                - **EF_UART_APB_DFT.v**: Verilog wrapper with DFT support specific to the APB interface of the EF_UART.
+                - **EF_UART_WB_DFT.v**: Verilog wrapper with DFT support specific to the Wishbone interface of the EF_UART.
+
+    - ip 
+        - **dependencies.json**: Used by IPM [Do NOT EDIT OR DELETE].
+
+    - **EF_UART.pdf**: Comprehensive documentation for the EF_UART, including its features, configuration, and usage.