added cell count and clock freq to yaml file

efabless · Apr 7, 2024 · 0056e5b · 0056e5b
1 parent a72cadd
commit 0056e5b
Showing 1 changed file with 8 additions and 2 deletions.
diff --git a/EF_UART.yaml b/EF_UART.yaml
@@ -18,11 +18,17 @@ info:
     - generic
   type": soft
   status: verified
-  cell_count: "690"
+  cell_count:
+    - IP: 1590
+    - APB: 1943
+    - AHBL: 1973
   width": "0.0"
   height": "0.0"
   technology: n/a
-  clock_freq_mhz: "10"
+  clock_freq_mhz:
+    - IP: 277
+    - APB: 208
+    - AHBL: 250
   digital_supply_voltage: n/a
   analog_supply_voltage: n/a