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JitArm64: Don't hardcode exception constants #9866
JitArm64: Don't hardcode exception constants #9866
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Unlike most constants we emit in JitArm64, these constants are *not* inherent to the CPU we're emulating, and can have whatever values we want. Let's handle them more robustly, in case we decide to change their values in the future.
FifoCI detected that this change impacts graphical rendering. Here are the behavior differences detected by the system:
automated-fifoci-reporter |
@@ -218,7 +218,7 @@ void JitArm64::twx(UGeckoInstruction inst) | |||
fpr.Flush(FlushMode::MaintainState); | |||
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LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); | |||
ORR(WA, WA, 24, 0); // Same as WA | EXCEPTION_PROGRAM | |||
ORRI2R(WA, WA, EXCEPTION_PROGRAM); |
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Worth noting that there was a bug in the previous code, which actually OR'd with EXCEPTION_PERFORMANCE_MONITOR (0x100), not EXCEPTION_PROGRAM (0x80).
@@ -774,7 +774,7 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) | |||
ARM64Reg WA = gpr.GetReg(); | |||
ARM64Reg XA = EncodeRegTo64(WA); | |||
LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); | |||
FixupBranch NoExtException = TBZ(WA, 3); // EXCEPTION_EXTERNAL_INT | |||
FixupBranch NoExtException = TBZ(WA, IntLog2(EXCEPTION_EXTERNAL_INT)); |
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This change specifically seems to have broken Pokémon XD (and presumably other games as well). Will investigate.
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Fixed in PR #9872.
Split out from PR #9865, since I don't think that PR is going to be merged any time soon.
Unlike most constants we emit in JitArm64, these constants are not inherent to the CPU we're emulating, and can have whatever values we want, so let's handle them in a more robust way. I was rather confused when I found out that a previous iteration of PR #9865 broke JitArm64, because I hadn't thought that making some simple changes to the values of an enum would do it!