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Builds chalandi rp2350 but not yet run
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/****************************************************************************************** | ||
Filename : main.c | ||
Core : ARM Cortex-M33 / RISC-V Hazard3 | ||
MCU : RP2350 | ||
Author : Chalandi Amine | ||
Owner : Chalandi Amine | ||
Date : 04.09.2024 | ||
Description : Application main function | ||
******************************************************************************************/ | ||
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//============================================================================= | ||
// Includes | ||
//============================================================================= | ||
#include "Platform_Types.h" | ||
#include "Cpu.h" | ||
#include "Gpio.h" | ||
#include "SysTickTimer.h" | ||
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//============================================================================= | ||
// Macros | ||
//============================================================================= | ||
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//============================================================================= | ||
// Prototypes | ||
//============================================================================= | ||
void main_Core0(void); | ||
void main_Core1(void); | ||
void BlockingDelay(uint32 delay); | ||
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//============================================================================= | ||
// Globals | ||
//============================================================================= | ||
#ifdef DEBUG | ||
volatile boolean boHaltCore0 = TRUE; | ||
volatile boolean boHaltCore1 = TRUE; | ||
#endif | ||
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//----------------------------------------------------------------------------------------- | ||
/// \brief main function | ||
/// | ||
/// \param void | ||
/// | ||
/// \return void | ||
//----------------------------------------------------------------------------------------- | ||
int main(void) | ||
{ | ||
/* Run the main function of the core 0, it will start the core 1 */ | ||
main_Core0(); | ||
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/* Synchronize with core 1 */ | ||
RP2350_MulticoreSync((uint32_t)HW_PER_SIO->CPUID.reg); | ||
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/* endless loop on the core 0 */ | ||
for(;;); | ||
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/* never reached */ | ||
return(0); | ||
} | ||
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//----------------------------------------------------------------------------------------- | ||
/// \brief main_Core0 function | ||
/// | ||
/// \param void | ||
/// | ||
/// \return void | ||
//----------------------------------------------------------------------------------------- | ||
void main_Core0(void) | ||
{ | ||
#ifdef DEBUG | ||
while(boHaltCore0); | ||
#endif | ||
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#ifdef CORE_FAMILY_ARM | ||
/* Disable interrupts on core 0 */ | ||
__asm volatile("CPSID i"); | ||
#endif | ||
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/* Output disable on pin 25 */ | ||
LED_GREEN_CFG(); | ||
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/* Start the Core 1 and turn on the led to be sure that we passed successfully the core 1 initiaization */ | ||
if(TRUE == RP2350_StartCore1()) | ||
{ | ||
LED_GREEN_ON(); | ||
} | ||
else | ||
{ | ||
/* Loop forever in case of error */ | ||
while(1) | ||
{ | ||
__asm volatile("NOP"); | ||
} | ||
} | ||
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} | ||
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//----------------------------------------------------------------------------------------- | ||
/// \brief main_Core1 function | ||
/// | ||
/// \param void | ||
/// | ||
/// \return void | ||
//----------------------------------------------------------------------------------------- | ||
volatile uint64_t* pMTIMECMP = (volatile uint64_t*)&(HW_PER_SIO->MTIMECMP.reg); | ||
volatile uint64_t* pMTIME = (volatile uint64_t*)&(HW_PER_SIO->MTIME.reg); | ||
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void main_Core1(void) | ||
{ | ||
#ifdef DEBUG | ||
while(boHaltCore1); | ||
#endif | ||
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/* Note: Core 1 is started with interrupt enabled by the BootRom */ | ||
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/* Clear the stiky bits of the FIFO_ST on core 1 */ | ||
HW_PER_SIO->FIFO_ST.reg = 0xFFu; | ||
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#ifdef CORE_FAMILY_ARM | ||
__asm volatile("DSB"); | ||
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/* Clear all pending interrupts on core 1 */ | ||
NVIC->ICPR[0] = (uint32)-1; | ||
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#endif | ||
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/* Synchronize with core 0 */ | ||
RP2350_MulticoreSync((uint32_t)HW_PER_SIO->CPUID.reg); | ||
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#ifdef CORE_FAMILY_RISC_V | ||
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/* configure the machine timer for 1Hz interrupt window */ | ||
#include "riscv.h" | ||
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/* enable machine timer interrupt */ | ||
riscv_set_csr(RVCSR_MIE_OFFSET, 0x80ul); | ||
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/* enable global interrupt */ | ||
riscv_set_csr(RVCSR_MSTATUS_OFFSET, 0x08ul); | ||
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/* configure machine timer to use 150 MHz */ | ||
HW_PER_SIO->MTIME_CTRL.bit.FULLSPEED = 1; | ||
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/* set next timeout (machine timer is enabled by default) */ | ||
*pMTIMECMP = *pMTIME + 150000000ul; //1s | ||
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#endif | ||
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while(1) | ||
{ | ||
#ifdef CORE_FAMILY_ARM | ||
#define DELAY 15000000 | ||
LED_GREEN_TOGGLE(); | ||
#else | ||
#define DELAY 10000000 | ||
#endif | ||
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BlockingDelay(DELAY); | ||
} | ||
} | ||
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#ifdef CORE_FAMILY_RISC_V | ||
__attribute__((interrupt)) void Isr_MachineTimerInterrupt(void); | ||
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void Isr_MachineTimerInterrupt(void) | ||
{ | ||
*pMTIMECMP = *pMTIME + 150000000ul; | ||
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LED_GREEN_TOGGLE(); | ||
} | ||
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#endif | ||
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ref_app/target/micros/rpi_pico2_rp2350/Std/Platform_Types.h
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/****************************************************************************************** | ||
Filename : Platform_Types.h | ||
Core : ARM Cortex-M33 / RISC-V Hazard3 | ||
MCU : RP2350 | ||
Author : Chalandi Amine | ||
Owner : Chalandi Amine | ||
Date : 04.09.2024 | ||
Description : Platform types header file | ||
******************************************************************************************/ | ||
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#ifndef __PLATFORM_TYPES_H__ | ||
#define __PLATFORM_TYPES_H__ | ||
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typedef unsigned char uint8; | ||
typedef signed char sint8; | ||
typedef unsigned short uint16; | ||
typedef signed short sint16; | ||
typedef unsigned long uint32; | ||
typedef signed long sint32; | ||
typedef unsigned long long uint64; | ||
typedef signed long long sint64; | ||
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typedef void (*pFunc)(void); | ||
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typedef enum | ||
{ | ||
FALSE = 0, | ||
TRUE | ||
}boolean; | ||
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#define NULL (void*)0 | ||
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#define NULL_PTR (void*)0 | ||
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#endif |
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