Continue cpp-ification of registers

ckormanyos · Sep 17, 2024 · da4ff17 · da4ff17
1 parent 3c7c5e0
commit da4ff17
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Showing 4 changed files with 38 additions and 20 deletions.
diff --git a/ref_app/src/mcal/rpi_pico2_rp2350/mcal_reg.h b/ref_app/src/mcal/rpi_pico2_rp2350/mcal_reg.h
@@ -10,12 +10,18 @@
 
   #include <cstdint>
 
+  // static_assert(offsetof(PPB_Type, CPACR) == 60808, "Error in offset");
+
   namespace mcal
   {
     namespace reg
     {
       // Global base addresses.
       constexpr std::uint32_t scs_base                  { UINT32_C(0xE000E000) };
+      constexpr std::uint32_t nvic_base                 { scs_base + UINT32_C(0x00000100) };
+
+      // NVIC registers.
+      constexpr std::uint32_t nvic_icpr0                { nvic_base + UINT32_C(0x00000180) };
 
       // SCnSCB registers.
       constexpr std::uint32_t scnscb_reserved0        { scs_base + UINT32_C(0x00000000) };
@@ -55,6 +61,9 @@
 
       constexpr std::uint32_t hw_per_psm_base           { UINT32_C(0x40018000) };
 
+      constexpr std::uint32_t hw_per_ppb_base           { UINT32_C(0xE0000000) };
+      constexpr std::uint32_t hw_per_ppb_cpacr          { hw_per_ppb_base + UINT32_C(0x0000ED88) };
+
       constexpr std::uint32_t hw_per_resets_resets_base { UINT32_C(0x40020000) };
       constexpr std::uint32_t hw_per_resets_reset       { hw_per_resets_resets_base + UINT32_C(0x00000000) };
       constexpr std::uint32_t hw_per_resets_wdsel       { hw_per_resets_resets_base + UINT32_C(0x00000004) };

diff --git a/ref_app/target/micros/rpi_pico2_rp2350/startup/core_1_run.cpp b/ref_app/target/micros/rpi_pico2_rp2350/startup/core_1_run.cpp
@@ -1,3 +1,9 @@
+///////////////////////////////////////////////////////////////////////////////
+//  Copyright Christopher Kormanyos 2024.
+//  Distributed under the Boost Software License,
+//  Version 1.0. (See accompanying file LICENSE_1_0.txt
+//  or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
 
 namespace local
 {

diff --git a/ref_app/target/micros/rpi_pico2_rp2350/startup/crt0.cpp b/ref_app/target/micros/rpi_pico2_rp2350/startup/crt0.cpp
@@ -1,25 +1,16 @@
-// ***************************************************************************************
-// Filename    : Startup.c
+///////////////////////////////////////////////////////////////////////////////
+//  Copyright Christopher Kormanyos 2024.
+//  Distributed under the Boost Software License,
+//  Version 1.0. (See accompanying file LICENSE_1_0.txt
+//  or copy at http://www.boost.org/LICENSE_1_0.txt)
 //
-// Author      : Chalandi Amine
-//
-// Owner       : Chalandi Amine
-// 
-// Date        : 04.09.2024
-// 
-// Description : C/C++ Runtime Setup (Crt0)
-// 
-// ***************************************************************************************
 
 #include <mcal_cpu.h>
 #include <mcal_cpu_rp2350.h>
 #include <mcal_irq.h>
 #include <mcal_reg.h>
 #include <mcal_wdg.h>
 
-#include <Platform_Types.h>
-#include <RP2350.h>
-
 #include <util/utility/util_time.h>
 
 namespace crt
@@ -48,7 +39,7 @@ namespace local
     const std::uint32_t
       cpuid
       {
-        HW_PER_SIO->CPUID.reg
+        mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_cpuid>::reg_get()
       };
 
     return cpuid;
@@ -152,7 +143,11 @@ auto __main_core1() -> void
   // begins here.
 
   // Clear the sticky bits of the FIFO_ST on core 1.
-  HW_PER_SIO->FIFO_ST.reg = 0xFFu;
+  // HW_PER_SIO->FIFO_ST.reg = 0xFFu;
+  mcal::reg::reg_access_static<std::uint32_t,
+                               std::uint32_t,
+                               mcal::reg::sio_fifo_st,
+                               std::uint32_t { UINT32_C(0xFF) }>::reg_set();
 
   // Setting EXTEXCLALL allows external exclusive operations to be used
   // in a configuration with no MPU. This is because the default memory map
@@ -168,14 +163,22 @@ auto __main_core1() -> void
 
   // Clear all pending interrupts on core 1.
 
-  NVIC->ICPR[0] = (uint32_t)-1;
+  // NVIC->ICPR[0] = (uint32_t)-1;
+  mcal::reg::reg_access_static<std::uint32_t,
+                               std::uint32_t,
+                               mcal::reg::nvic_icpr0,
+                               std::uint32_t { UINT32_C(0xFFFFFFFF) }>::reg_set();
 
   // Synchronize with core 0.
   mcal::cpu::rp2350::multicore_sync(local::get_cpuid());
 
   // Initialize the FPU on Core 1: Enable CP10 and CP11.
-  //CPACR |= 0x00F00000UL;
-  HW_PER_PPB->CPACR.reg |= (std::uint32_t) 0x00F00000UL;
+
+  // HW_PER_PPB->CPACR.reg |= (std::uint32_t) 0x00F00000UL;
+  mcal::reg::reg_access_static<std::uint32_t,
+                               std::uint32_t,
+                               mcal::reg::hw_per_ppb_cpacr,
+                               std::uint32_t { UINT32_C(0x00F00000) }>::reg_or();
 
   // Jump to main on core 1 (and never return).
   asm volatile("ldr r3, =main");

diff --git a/ref_app/target/micros/rpi_pico2_rp2350/startup/image_definition_block.c b/ref_app/target/micros/rpi_pico2_rp2350/startup/image_definition_block.c
@@ -17,7 +17,7 @@
 
 #include <stdint.h>
 
-const uint32_t __attribute__((section(".image_start_block"), used, aligned(4))) image_definition_Block[] =
+const uint32_t __attribute__((section(".image_start_block"), used, aligned(4))) image_definition_block[] =
 {
   UINT32_C(0xFFFFDED3),
   UINT32_C(0x10210142),