Conversation
leon6002
requested review from
DavidMCerdeira,
danielRep,
josecm,
miguelafsilva5 and
sandro2pinto
as code owners
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The PR is already in a good state for approval. There is, however, an issue with ` e3650_enable_imp_def: these type of core implementation-defined configurations should be done in a different manner. We discussed a possible solution for these cases in our weekly meeting. We'll try to introduce the necessary infrastructure for this in the following days. I'll tag this PR as soon as that PR is introduced.
Please solve also the issues with gitlint (commit sign-off) and the code needs to be format using make format
Signed-off-by: gulong <uomleon@163.com>
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LGTM! Thanks @leon6002! Will take a look at the demo PR after this is merged! |
| #define PSCI_STATE_TYPE_POWERDOWN (0UL << 30) // TBD | ||
| #define PSCI_STATE_TYPE_BIT (0UL << 30) // TBD | ||
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| #endif /* __PLAT_PSCI_H__ */ |
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| #endif /* __PLAT_PSCI_H__ */ | |
| #endif /* __PLAT_PSCI_H__ */ |
| #define E3650_UART_BASE 0xF8D60000 // UART15 Base | ||
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| #define E3650_GICD_BASE 0xF4000000 // GIC Distributor | ||
| #define E3650_GICR_BASE 0xF4100000 // GIC Redistributor (Core 0) |
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Can you move this to the platform.h?
| .mmio_region_num = 3, | ||
| .mmio_regions = (struct mem_region[]) { | ||
| { // UART15 | ||
| .base = E3650_UART_BASE, | ||
| .size = 0x1000, | ||
| }, | ||
| { // GIC Distributor | ||
| .base = E3650_GICD_BASE, | ||
| .size = 0x10000, | ||
| }, | ||
| { // GIC Redistributor | ||
| .base = E3650_GICR_BASE, | ||
| .size = 0x20000, | ||
| }, | ||
| }, |
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The mmio_regions field it's supposed to be used in conjunction with the MMIO_SLAVE_SIDE_PROT configuration, which we are not using in this platform. The idea is to map all mmio regions so that protection is guaranteed at the slave side and not by the MPU. This allows us to save MPU entries. As such, this is unnecessary here. The information in .consoleand .gic is sufficient to map those in the MPU.
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| .generic_timer = { | ||
| .base_addr = 0xF8C20000, // APB_SYS_CNT_BASE |
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The R52 is a special case the generic timer is implementation-defined. By configuring in this field the based address of the timer, we are falling into the case where we read freq from memory-mapped timer control registers. Is this true in E3650? Because from past experience on porting R52-based platforms, we had to explicitly force the freq using fixed_freq field as no memory-mapped registers were available.
3 participants
This PR added support for Semidrive's E3650 platform.
The related PR:
bao-project/bao-demos#75