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Remove macro_rd and associated fns
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RossPorter506 committed Jan 4, 2025
1 parent dde74d1 commit d6fb77f
Showing 1 changed file with 0 additions and 60 deletions.
60 changes: 0 additions & 60 deletions src/hw_traits/eusci.rs
Original file line number Diff line number Diff line change
Expand Up @@ -29,17 +29,6 @@ macro_rules! reg_struct {
$($(pub $int_name : $int_size , $(#[$i_attr])*)*)?
}

#[allow(unused_macros)]
macro_rules! $macro_rd {
($reader : expr) => {
$struct_name{
$($($bool_name : $reader.$bool_name().bit(),)*)?
$($($val_name : <$val_type>::from(<$size>::from($reader.$val_name().variant())),)*)?
$($($int_name : <$int_size>::from($reader.$int_name().bits()),)*)?
}
};
}

#[allow(unused_macros)]
macro_rules! $macro_wr {
($reg : expr) => { |w|
Expand Down Expand Up @@ -150,19 +139,6 @@ pub struct UcbCtlw1, UcbCtlw1_rd, UcbCtlw1_wr {
}
}

reg_struct! {
pub struct UcbStatw, UcbStatw_rd, UcbStatw_wr{
flags{
pub ucscllow: bool,
pub ucgc: bool,
pub ucbbusy: bool,
}
ints {
pub ucbcnt: u8,
}
}
}

// in order to avoid 4 separate structs, I manually implemented the macro for these registers
pub struct UcbI2coa {
pub ucgcen: bool,
Expand Down Expand Up @@ -290,19 +266,15 @@ pub trait EUsciI2C: Steal {
fn ctw0_clear_rst(&self);

// Modify only when UCSWRST = 1
// fn ctw0_rd(&self) -> UcbCtlw0;
fn ctw0_wr(&self, reg: &UcbCtlw0);

// Modify only when UCSWRST = 1
// fn ctw1_rd(&self) -> UcbCtlw1;
fn ctw1_wr(&self, reg: &UcbCtlw1);

// Modify only when UCSWRST = 1
fn brw_rd(&self) -> u16;
fn brw_wr(&self, val: u16);

fn statw_rd(&self) -> UcbStatw;

// Modify only when UCSWRST = 1
fn tbcnt_rd(&self) -> u16;
fn tbcnt_wr(&self, val: u16);
Expand All @@ -324,7 +296,6 @@ pub trait EUsciI2C: Steal {
fn i2csa_rd(&self) -> u16;
fn i2csa_wr(&self, val: u16);

// fn ie_rd(&self) -> UcbIe;
fn ie_wr(&self, reg: &UcbIe);

fn ifg_rd(&self) -> Self::IfgOut;
Expand All @@ -342,8 +313,6 @@ pub trait EusciSPI: Steal {

fn brw_wr(&self, val: u16);

fn statw_rd(&self) -> Self::Statw;

fn uclisten_set(&self);
fn uclisten_clear(&self);

Expand Down Expand Up @@ -432,11 +401,6 @@ macro_rules! eusci_impl {
self.$ucxbrw().write(|w| unsafe { w.bits(val) });
}

#[inline(always)]
fn statw_rd(&self) -> Self::Statw {
self.$ucxstatw().read()
}

#[inline(always)]
fn uclisten_set(&self) {
unsafe { self.$ucxstatw().set_bits(|w| w.uclisten().set_bit()) }
Expand Down Expand Up @@ -767,23 +731,11 @@ macro_rules! eusci_b_impl {
self.$ucbxifg().read().ucrxifg0().bit()
}

// #[inline(always)]
// fn ctw0_rd(&self) -> UcbCtlw0 {
// let content = self.$ucbxctlw0().read();
// UcbCtlw0_rd! {content}
// }

#[inline(always)]
fn ctw0_wr(&self, reg: &UcbCtlw0) {
self.$ucbxctlw0().write(UcbCtlw0_wr! {reg});
}

// #[inline(always)]
// fn ctw1_rd(&self) -> UcbCtlw1 {
// let content = self.$ucbxctlw1.read();
// UcbCtlw1_rd! {content}
// }

#[inline(always)]
fn ctw1_wr(&self, reg: &UcbCtlw1) {
self.$ucbxctlw1.write(UcbCtlw1_wr! {reg});
Expand All @@ -798,12 +750,6 @@ macro_rules! eusci_b_impl {
self.$ucbxbrw().write(|w| unsafe { w.bits(val) });
}

#[inline(always)]
fn statw_rd(&self) -> UcbStatw {
let content = self.$ucbxstatw().read();
UcbStatw_rd! {content}
}

#[inline(always)]
fn tbcnt_rd(&self) -> u16 {
self.$ucbxtbcnt.read().bits()
Expand Down Expand Up @@ -912,12 +858,6 @@ macro_rules! eusci_b_impl {
self.$ucbxi2csa.write(|w| unsafe { w.bits(val) });
}

// #[inline(always)]
// fn ie_rd(&self) -> UcbIe {
// let content = self.$ucbxie().read();
// UcbIe_rd! {content}
// }

#[inline(always)]
fn ie_wr(&self, reg: &UcbIe) {
self.$ucbxie().write(UcbIe_wr! {reg});
Expand Down

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