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feat: update project tt_um_wokwi_380408409844584449 from chaseadam/tt5
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Commit: 6ceeeb70a2fd89444e17a2e486a070bcc56f49f1
Workflow: https://github.com/chaseadam/tt5/actions/runs/6755385200
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@TinyTapeoutBot @urish
TinyTapeoutBot authored and urish committed Nov 4, 2023
1 parent 8957111 commit 9dc5cb0
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Showing 9 changed files with 2,034 additions and 1,730 deletions.
4 changes: 2 additions & 2 deletions projects/tt_um_wokwi_380408409844584449/commit_id.json
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@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt05 98e7cb27",
"repo": "https://github.com/chaseadam/tt5",
"commit": "87dc212818ec0a70ed6aaa78f33de9177485563d",
"workflow_url": "https://github.com/chaseadam/tt5/actions/runs/6750895428",
"commit": "6ceeeb70a2fd89444e17a2e486a070bcc56f49f1",
"workflow_url": "https://github.com/chaseadam/tt5/actions/runs/6755385200",
"sort_id": 1699053174514,
"openlane_version": "OpenLane 7e5a2e9fb274c0a100b4859a927adce7089455ff",
"power_gate": false
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6 changes: 3 additions & 3 deletions projects/tt_um_wokwi_380408409844584449/info.yaml
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Expand Up @@ -21,10 +21,10 @@ yaml_version: 4
#
# Here is a great example: https://github.com/davidsiaw/tt02-davidsiaw-stackcalc/blob/38c5647f83aad2aec675d566aa3d67b98f0aac81/info.yaml
documentation:
author: "chaseadam" # Your name
title: "Basic adam" # Project title
author: "Adam Chasen" # Your name
title: "Supecon Gate Play" # Project title
language: "Wokwi" # other examples include Verilog, Amaranth, VHDL, etc
description: "only a gate" # Short description of what your project does
description: "One of each with some flippy floppies" # Short description of what your project does

# Longer description of how the project works. You can use standard markdown format.
how_it_works: |
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2 changes: 1 addition & 1 deletion projects/tt_um_wokwi_380408409844584449/metrics.csv
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@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
/work/src,tt_um_wokwi_380408409844584449,wokwi,flow completed,0h1m29s0ms,0h1m10s0ms,3834.7832222609677,0.0187755072,1917.3916111304839,0.72,-1,490.09,29,0,0,0,0,0,0,0,0,0,0,-1,-1,406,160,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,417730.0,0.0,1.05,0.37,0.0,0.0,-1,33,68,33,68,0,0,0,4,1,0,0,0,0,0,0,0,5,4,2,1293,246,0,260,36,1835,17274.0672,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,40.710,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
/work/src,tt_um_wokwi_380408409844584449,wokwi,flow completed,0h2m10s0ms,0h1m43s0ms,4900.000784000125,0.0187755072,2450.0003920000627,1.19,-1,491.81,35,0,0,0,0,0,0,0,0,0,0,-1,-1,593,208,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,525560.0,0.0,1.49,0.67,0.0,0.0,-1,52,87,52,87,0,0,0,9,1,2,1,0,1,1,0,0,8,7,2,1284,246,0,259,46,1835,17274.0672,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,40.710,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
22 changes: 13 additions & 9 deletions projects/tt_um_wokwi_380408409844584449/synthesis-stats.txt
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Expand Up @@ -3,19 +3,23 @@

=== tt_um_wokwi_380408409844584449 ===

Number of wires: 13
Number of wire bits: 48
Number of public wires: 12
Number of public wire bits: 47
Number of wires: 19
Number of wire bits: 54
Number of public wires: 17
Number of public wire bits: 52
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 29
Number of cells: 35
sky130_fd_sc_hd__and2_2 1
sky130_fd_sc_hd__buf_1 1
sky130_fd_sc_hd__buf_2 6
sky130_fd_sc_hd__conb_1 18
sky130_fd_sc_hd__buf_1 2
sky130_fd_sc_hd__buf_2 8
sky130_fd_sc_hd__conb_1 16
sky130_fd_sc_hd__dfxtp_2 2
sky130_fd_sc_hd__inv_2 3
sky130_fd_sc_hd__nand2_2 1
sky130_fd_sc_hd__or2_2 1
sky130_fd_sc_hd__xor2_2 1

Chip area for module '\tt_um_wokwi_380408409844584449': 120.115200
Chip area for module '\tt_um_wokwi_380408409844584449': 197.689600

Binary file modified projects/tt_um_wokwi_380408409844584449/tt_um_wokwi_380408409844584449.gds
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93 changes: 49 additions & 44 deletions projects/tt_um_wokwi_380408409844584449/tt_um_wokwi_380408409844584449.lef
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Expand Up @@ -50,6 +50,7 @@ MACRO tt_um_wokwi_380408409844584449
PIN clk
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.852000 ;
PORT
LAYER met4 ;
RECT 145.670 110.520 145.970 111.520 ;
Expand Down Expand Up @@ -101,6 +102,7 @@ MACRO tt_um_wokwi_380408409844584449
PIN ui_in[3]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.196500 ;
PORT
LAYER met4 ;
RECT 131.870 110.520 132.170 111.520 ;
Expand All @@ -109,7 +111,6 @@ MACRO tt_um_wokwi_380408409844584449
PIN ui_in[4]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.196500 ;
PORT
LAYER met4 ;
RECT 129.110 110.520 129.410 111.520 ;
Expand Down Expand Up @@ -346,7 +347,7 @@ MACRO tt_um_wokwi_380408409844584449
PIN uo_out[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
ANTENNADIFFAREA 0.445500 ;
PORT
LAYER met4 ;
RECT 93.230 110.520 93.530 111.520 ;
Expand All @@ -364,6 +365,7 @@ MACRO tt_um_wokwi_380408409844584449
PIN uo_out[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
PORT
LAYER met4 ;
RECT 87.710 110.520 88.010 111.520 ;
Expand All @@ -390,6 +392,7 @@ MACRO tt_um_wokwi_380408409844584449
PIN uo_out[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
PORT
LAYER met4 ;
RECT 79.430 110.520 79.730 111.520 ;
Expand Down Expand Up @@ -429,58 +432,60 @@ MACRO tt_um_wokwi_380408409844584449
LAYER li1 ;
RECT 2.760 2.635 165.600 108.885 ;
LAYER met1 ;
RECT 2.760 2.480 166.400 109.440 ;
RECT 2.760 2.480 166.400 109.780 ;
LAYER met2 ;
RECT 22.345 2.535 166.370 110.005 ;
LAYER met3 ;
RECT 22.325 2.555 166.390 109.985 ;
LAYER met4 ;
RECT 33.210 110.120 34.870 110.520 ;
RECT 35.970 110.120 37.630 110.520 ;
RECT 38.730 110.120 40.390 110.520 ;
RECT 41.490 110.120 43.150 110.520 ;
RECT 44.250 110.120 45.910 110.520 ;
RECT 47.010 110.120 48.670 110.520 ;
RECT 49.770 110.120 51.430 110.520 ;
RECT 52.530 110.120 54.190 110.520 ;
RECT 55.290 110.120 56.950 110.520 ;
RECT 58.050 110.120 59.710 110.520 ;
RECT 60.810 110.120 62.470 110.520 ;
RECT 63.570 110.120 65.230 110.520 ;
RECT 66.330 110.120 67.990 110.520 ;
RECT 69.090 110.120 70.750 110.520 ;
RECT 71.850 110.120 73.510 110.520 ;
RECT 74.610 110.120 76.270 110.520 ;
RECT 77.370 110.120 79.030 110.520 ;
RECT 80.130 110.120 81.790 110.520 ;
RECT 82.890 110.120 84.550 110.520 ;
RECT 85.650 110.120 87.310 110.520 ;
RECT 88.410 110.120 90.070 110.520 ;
RECT 91.170 110.120 92.830 110.520 ;
RECT 93.930 110.120 95.590 110.520 ;
RECT 96.690 110.120 98.350 110.520 ;
RECT 99.450 110.120 101.110 110.520 ;
RECT 102.210 110.120 103.870 110.520 ;
RECT 104.970 110.120 106.630 110.520 ;
RECT 107.730 110.120 109.390 110.520 ;
RECT 110.490 110.120 112.150 110.520 ;
RECT 113.250 110.120 114.910 110.520 ;
RECT 116.010 110.120 117.670 110.520 ;
RECT 118.770 110.120 120.430 110.520 ;
RECT 121.530 110.120 123.190 110.520 ;
RECT 124.290 110.120 125.950 110.520 ;
RECT 127.050 110.120 128.710 110.520 ;
RECT 129.810 110.120 131.470 110.520 ;
RECT 132.570 110.120 134.230 110.520 ;
RECT 135.330 110.120 136.990 110.520 ;
RECT 138.090 110.120 139.750 110.520 ;
RECT 32.495 109.440 140.465 110.120 ;
RECT 33.210 110.120 34.870 111.170 ;
RECT 35.970 110.120 37.630 111.170 ;
RECT 38.730 110.120 40.390 111.170 ;
RECT 41.490 110.120 43.150 111.170 ;
RECT 44.250 110.120 45.910 111.170 ;
RECT 47.010 110.120 48.670 111.170 ;
RECT 49.770 110.120 51.430 111.170 ;
RECT 52.530 110.120 54.190 111.170 ;
RECT 55.290 110.120 56.950 111.170 ;
RECT 58.050 110.120 59.710 111.170 ;
RECT 60.810 110.120 62.470 111.170 ;
RECT 63.570 110.120 65.230 111.170 ;
RECT 66.330 110.120 67.990 111.170 ;
RECT 69.090 110.120 70.750 111.170 ;
RECT 71.850 110.120 73.510 111.170 ;
RECT 74.610 110.120 76.270 111.170 ;
RECT 77.370 110.120 79.030 111.170 ;
RECT 80.130 110.120 81.790 111.170 ;
RECT 82.890 110.120 84.550 111.170 ;
RECT 85.650 110.120 87.310 111.170 ;
RECT 88.410 110.120 90.070 111.170 ;
RECT 91.170 110.120 92.830 111.170 ;
RECT 93.930 110.120 95.590 111.170 ;
RECT 96.690 110.120 98.350 111.170 ;
RECT 99.450 110.120 101.110 111.170 ;
RECT 102.210 110.120 103.870 111.170 ;
RECT 104.970 110.120 106.630 111.170 ;
RECT 107.730 110.120 109.390 111.170 ;
RECT 110.490 110.120 112.150 111.170 ;
RECT 113.250 110.120 114.910 111.170 ;
RECT 116.010 110.120 117.670 111.170 ;
RECT 118.770 110.120 120.430 111.170 ;
RECT 121.530 110.120 123.190 111.170 ;
RECT 124.290 110.120 125.950 111.170 ;
RECT 127.050 110.120 128.710 111.170 ;
RECT 129.810 110.120 131.470 111.170 ;
RECT 132.570 110.120 134.230 111.170 ;
RECT 135.330 110.120 136.990 111.170 ;
RECT 138.090 110.120 139.750 111.170 ;
RECT 140.850 110.120 142.510 111.170 ;
RECT 143.610 110.120 145.270 111.170 ;
RECT 32.495 109.440 145.985 110.120 ;
RECT 32.495 96.055 42.270 109.440 ;
RECT 44.670 96.055 62.625 109.440 ;
RECT 65.025 96.055 82.980 109.440 ;
RECT 85.380 96.055 103.335 109.440 ;
RECT 105.735 96.055 123.690 109.440 ;
RECT 126.090 96.055 140.465 109.440 ;
RECT 126.090 96.055 144.045 109.440 ;
END
END tt_um_wokwi_380408409844584449
END LIBRARY
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