feat: update project tt_um_mvm_ from MathiasTEriksen/tt05-SparcityAware

Commit: 06cb9b036e5633e85c5ead570f3592234ed2f93e
Workflow: https://github.com/MathiasTEriksen/tt05-SparcityAware/actions/runs/6756294706

projects/tt_um_mvm_/LICENSE

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projects/tt_um_mvm_/commit_id.json

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+{
+  "app": "Tiny Tapeout tt05 98e7cb27",
+  "repo": "https://github.com/MathiasTEriksen/tt05-SparcityAware",
+  "commit": "06cb9b036e5633e85c5ead570f3592234ed2f93e",
+  "workflow_url": "https://github.com/MathiasTEriksen/tt05-SparcityAware/actions/runs/6756294706",
+  "sort_id": 1699120044400,
+  "openlane_version": "OpenLane 7e5a2e9fb274c0a100b4859a927adce7089455ff",
+  "power_gate": false
+}

projects/tt_um_mvm_/info.yaml

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+--- 
+# Tiny Tapeout project information
+project:
+  wokwi_id:    0        # If using wokwi, set this to your project's ID
+
+# If using an HDL, set wokwi_id as 0 and uncomment and list your source files here. 
+# Source files must be in ./src and you must list each source file separately
+  source_files:        
+    - tt_um_mvm_.v
+    - mvm.v
+  top_module:  "tt_um_mvm_"      # Put the name of your top module here, must start with "tt_um_". Make it unique by including your github username
+
+# How many tiles your design occupies? A single tile is about 167x108 uM.
+  tiles: "1x1"    # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2 or 8x2
+
+# Keep a track of the submission yaml
+yaml_version: 4
+
+# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
+# it does and how to operate it. This info will be automatically collected and used to make a datasheet for the chip.
+#
+# Here is a great example: https://github.com/davidsiaw/tt02-davidsiaw-stackcalc/blob/38c5647f83aad2aec675d566aa3d67b98f0aac81/info.yaml
+documentation: 
+  author:       "Mathias Eriksen" 
+  title:        "Matrix Vector Multiplication Accelerator" 
+  language:     "Verilog" 
+  description:  "This project takes in a 3x3 weight matrix in Compressed Sparse Row format,
+                 value is quantized and 8 bits long. It also takes in the corresponding
+                 3 bit spike train. It then computes the matrix vector multiplication
+                 product and outputs the resulting vector on the output line"
+
+# Longer description of how the project works. You can use standard markdown format.
+  how_it_works: |
+      Uses a set of registers and flags from the CPU to fetch the weight matrix in CSR format 
+      as well as the spike train. The values are passed in one at a time, and the entire matrix
+      is loaded into registers that are internal to the IC
+
+      Once the full sparse matrix and spike train are loaded in, an algorithm is used to compute
+      the resultant vector of the matrix vector multiplication of the weight matrix and the spike train
+
+      Finally, the output vector is transmitted on the output line, along with a flag bit which flips
+      each time a new value is sent out.
+
+# Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
+  how_to_test:  |
+      After reset, send values in CSR format using the input bits described below. Send a value by toggling
+      the sending CPU flag for one clock cycle while the values are in their respective registers. Repeat
+      for the entire matrix, toggling the sending CPU flag low between each value. Then, check the return
+      values by waiting for the sending out flag from the IC to flip. After the first flip, the other
+      two values will be sent on each clock edge. 
+
+# A description of what the inputs do (e.g. red button, SPI CLK, SPI MOSI, etc).
+  inputs:  
+    - Input Value bit 0             
+    - Input Value bit 1
+    - Input Value bit 2
+    - Input Value bit 3
+    - Input Value bit 4
+    - Input Value bit 5
+    - Input Value bit 6
+    - Input Value bit 7
+# A description of what the outputs do (e.g. status LED, SPI MISO, etc)
+  outputs:
+    - Output Value bit 0
+    - Output Value bit 1 
+    - Output Value bit 2
+    - Output Value bit 3
+    - Output Value bit 4
+    - Output Value bit 5
+    - Output Value bit 6
+    - Output Value bit 7
+# A description of what the bidirectional I/O pins do (e.g. I2C SDA, I2C SCL, etc)
+  bidirectional:
+    - FETCH Ready flag (out)
+    - Sending out flag  (out)
+    - Done sending flag (in)
+    - Sending CPU flag (in)
+    - Column Value bit 0
+    - Column Value bit 1
+    - Row Value bit 0
+    - Row Value bit 1
+
+# The following fields are optional
+  tag:          "timer, test"      # comma separated list of tags: test, encryption, experiment, clock, animation, utility, industrial, pwm, fpga, alu, microprocessor, risc, riscv, sensor, signal generator, fft, filter, music, bcd, sound, serial, timer, random number generator, calculator, decoder, counter, puzzle, multiplier, game, oscillator,
+  external_hw:  ""      # Describe any external hardware needed
+  discord:      "Mati_"      # Your discord handle, used for communication and automatically assigning tapeout role after a submission
+  doc_link:     ""      # URL to longer form documentation, eg the README.md in your repository
+  clock_hz:     10000000       # Clock frequency in Hz (if required)
+  picture:      ""      # relative path to a picture in your repository (must be 512kb or less)

projects/tt_um_mvm_/metrics.csv

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+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
+/work/src,tt_um_mvm_,wokwi,flow completed,0h2m55s0ms,0h2m24s0ms,97893.4939238286,0.0187755072,48946.7469619143,48.18,-1,572.0,735,0,0,0,0,0,0,0,0,0,0,-1,-1,17769,5619,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,10651033.0,0.0,37.56,27.77,3.43,0.15,-1,465,660,55,224,0,0,0,592,11,0,11,21,103,11,9,27,180,164,15,735,246,0,344,919,2244,17274.0672,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,40.710,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0